Title:
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/066221
Kind Code:
A1
Abstract:
Disclosed are a semiconductor structure, and a method for manufacturing the semiconductor structure. The semiconductor structure comprises: a carrier layer, a barrier layer, a solder layer and an adhesive layer. The barrier layer is located on a surface of the carrier layer, and an opening is arranged in the barrier layer. The barrier layer comprises multiple stacked sub-barrier layers, the sub-barrier layers forming multiple steps at the opening, and the heights of the multiple steps sequentially decrease in the direction from the outside of the opening to the inside of the opening. The solder layer and the adhesive layer are located in the opening, and the adhesive layer covers the solder layer.
Inventors:
JI HONGKAI (CN)
Application Number:
PCT/CN2023/081157
Publication Date:
April 04, 2024
Filing Date:
March 13, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L23/498; H01L21/48
Domestic Patent References:
| WO2010100706A1 | 2010-09-10 | |||
| WO2008156100A1 | 2008-12-24 |
Foreign References:
| CN113972183A | 2022-01-25 | |||
| JP2006202881A | 2006-08-03 | |||
| CN102612255A | 2012-07-25 | |||
| JPH06350230A | 1994-12-22 |
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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