Title:
SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2023/133993
Kind Code:
A1
Abstract:
The embodiment of the present disclosure relates to the field of semiconductors. Provided are a semiconductor structure and a method for preparing a semiconductor structure. The semiconductor structure comprises: a substrate (100), which is internally provided with a bit line (101) extending in a first direction; an active pillar (120), which is located on the bit line (101), wherein the bottom surface of the active pillar (120) is in contact with the bit line (101), and the active pillar (120) is doped with an N-type element; an inverse region (140), which is located at a side surface of the active pillar (120), the inverse region (140) being doped with a P-type element; and a dielectric layer (150), and a word line (160) extending along a second direction, wherein the dielectric layer (150) and the word line (160) cover a portion of the inverse region (140), and the dielectric layer (150) is located between the word line (160) and the inverse region (140).
Inventors:
GUO SHUAI (CN)
Application Number:
PCT/CN2022/079804
Publication Date:
July 20, 2023
Filing Date:
March 08, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/8242; H01L27/108
Foreign References:
| CN108461496A | 2018-08-28 | |||
| CN101814531A | 2010-08-25 | |||
| CN103094068A | 2013-05-08 | |||
| US20210233913A1 | 2021-07-29 | |||
| US20140264746A1 | 2014-09-18 |
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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