SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR

Title:

SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR

Document Type and Number:

WIPO Patent Application WO/2023/097909

Kind Code:

A1

Abstract:

The present disclosure relates to the technical field of semiconductors. Provided are a semiconductor structure and a preparation method therefor. The preparation method for a semiconductor structure comprises: providing a substrate, wherein the substrate comprises a peripheral circuit area and an array area, which has a storage unit, which peripheral circuit area comprises a first region and a second region. In the present disclosure, a logic device for controlling the storage unit, and a magnetic storage device are simultaneously prepared in the peripheral circuit area by using a process for preparing a dynamic random access memory, such that one semiconductor structure has two storage structures. Compared with the technique of separately preparing two storage structures, the present disclosure can simplify steps, and reduce manufacturing costs. In addition, the magnetic storage device is prepared by means of the process for manufacturing a dynamic random access memory, such that the integration level of the magnetic storage device can be improved, thereby facilitating the development of a semiconductor structure addressing integration.

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Inventors:

WANG XIAOGUANG (CN)
LI HUIHUI (CN)
CHANG WEI (CN)
CAO KANYU (CN)

Application Number:

PCT/CN2022/078090

Publication Date:

June 08, 2023

Filing Date:

February 25, 2022

Export Citation:

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Assignee:

CHANGXIN MEMORY TECH INC (CN)
BEIJING SUPERSTRING ACADEMY OF MEMORY TECH (CN)

International Classes:

H01L27/22; H01L21/8229; H01L43/12; H01L43/08

Foreign References:

CN109003978A	2018-12-14
CN108780841A	2018-11-09
CN109545957A	2019-03-29
CN109994601A	2019-07-09
US20120241880A1	2012-09-27
CN108232009A	2018-06-29

Attorney, Agent or Firm:

LEADER PATENT & TRADEMARK FIRM (CN)

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