TECHNICAL FIELD

[0001] The present disclosure is directed generally to methods and apparatus for encoding and decoding of data using concatenated polarization adjusted convolutional codes.

BACKGROUND

[0002] In modern digital data transmission (wireless telephony, wireless data transmission, optical disk transmission to a player, music players receiving music data, and so on), a channel encoder can receive a data block and add redundancy to it (by passing the data block through a transformation) to produce a coded block that is better protected against noise in a transmission channel than the data block from which it is derived. The coded block is transmitted over the transmission channel and the transmission channel produces a received block at its output, where the received block is a version of the coded block corrupted by channel noise and/or distortion. A channel decoder processes the received block to produce a decoded data block and forwards the decoded data block to a destination, e.g., a music player, which plays the decoded data as audio, or a storage device, which stores the decoded data as a file.

[0003] A frame error is said to occur during transmission if the decoded data block is not an identical copy of the data block. A generally accepted design goal for channel coding is to reduce the frame error rate (FER) to acceptable levels. Channel codes that reduce the FER at the cost of too much computation are of little practical use. There exist many classes of channel codes, such as linear block codes, that are able to achieve an acceptable tradeoff between FER and complexity of implementation. A subclass of linear block codes is the subclass of triangular factorization (TF) codes introduced in the U.S. patent application of [ARI2019a], incorporated herein by reference and included in the file history of this application. The present principles are concerned primarily with a special case of TF codes called polarization adjusted convolutional (PAC) codes [ARI2019a], [ARI2019b], which combine convolutional coding with channel polarization [ARI2009]. PAC codes can be decoded using a low-complexity depth-first search method, called sequential decoding. In [ARI2019a], [ARI2019b], sequential decoding was adapted to PAC codes. A simulation study given in [ARI2019a], [ARI2019b] demonstrated that a certain PAC code of block length 128 is capable of achieving near-optimal FER performance under sequential decoding.

[0004] The object of the present principles is to provide solutions to certain problems that currently limit the practical utility of PAC codes. First, there is need for reducing the adverse effects of the variability of computational complexity in sequential decoding of PAC codes. The complexity of sequential decoding is highly sensitive to the severity of noise in the channel, which becomes the primary impediment to applying sequential decoding to PAC codes. [0005] Second, there is need for leveraging the near-optimal performance of short PAC codes to build longer codes that can achieve extremely low FER values (such as IO-15) that are required in certain applications, such as fiber-optic data transmission or hard-disk data storage.

[0006] Third, PAC codes are designed to be decoded sequentially. Decoding decision have to be made in a fixed order so as to exploit the benefits of channel polarization. On the other hand, the sequential nature of decoding presents a throughput bottleneck, severely limiting the number of bits that can be communicated between the source and the destination. Although pipelining and unrolling techniques may be used to improve the throughput in hardware implementations of PAC decoders, such techniques require extra memory between pipeline stages, which increases chip area and cost. Increasing clock speeds in order to increase throughput does not solve the throughput problem either because increased clock speeds cause power-density problems in VLSI circuits. The only viable option for scaling the throughput of data processing systems has become the use of multi-core processors; see [ZAB2013] for an elaboration of this point. There is need for coding architectures that are custom designed for multi-core implementations so that multiple copies of PAC codes can be encoded and decoded independently in parallel.

[0007] The present principles address the above issues by introducing a concatenated coding scheme that employs PAC codes as inner codes. As background, we present some results on sequential decoding and concatenated coding.

[0008] Sequential decoding is a decoding method originally developed for convolutional codes [FAN1963]. The computation problem in sequential decoding is a well-studied problem in the context of conventional convolutional codes. In [JAC1967], it is shown that computation in sequential decoding is a random variable with a Pareto distribution, which is a probability distribution with heavy tails. It is also shown in [JAC 1967] that the mean of the computational complexity in sequential decoding becomes unbounded at data transmission rates beyond a certain threshold rate, called the (computational) cutoff rate. Unfortunately, the cutoff rate of sequential decoding may be significantly smaller than the channel capacity. [0009] There are several methods in the prior art that circumvent the cutoff rate barrier by employing multiple sequential decoders in parallel in various concatenation schemes. One such method is a concatenated coding scheme presented in [FAL1969], which employs (conventional) convolutional codes as inner codes and Reed-Solomon codes as outer codes. The outer Reed-Solomon codes place algebraic constraints across the inputs to the inner convolutional codes. At the receiver side, each inner convolutional code is decoded by a separate sequential decoder. The outer Reed-Solomon code is tasked with correction of errors and erasures left behind by the inner sequential decoders. Although [FAL1969] showed that this type of concatenated coding can achieve channel capacity at finite average complexity per decoded bit, the method in [FAL1969] was still far from being practical for the technology of the day.

[0010] We now turn to a review of concatenated coding. Although concatenated coding dates back to the product coding idea of [ELI1954], the seminal work on concatenated coding is [FOR1965], where concatenated coding was introduced as a method of building long codes out of short ones. Later work significantly generalized the basic ideas of [FOR1965] and introduced “generalized concatenated coding” (GCC) and “multilevel coding” (MLC); see, e.g., [ZYA1999]. In GCC/MLC schemes, there is a layered inner code and multiple outer codes whose rates need not be identical. By proper choice of the types and parameters of the inner and outer codes in a GCC/MLC scheme, one can obtain a rich set of tradeoffs between FER performance and complexity. The method in [FAL1969] may be regarded as a limited form of generalized concatenation method, limited in the sense that all outer codes operate at the same rate. In the context of polar coding, GCC/MLC schemes have been studied in [ARI2009] and [MAH2016].

[0011] The present disclosure introduces GCC/MLC coding techniques in connection with PAC codes. Constructing GCC/MLC schemes with PAC inner codes involves a number of novel problems, such as, introducing a layered structure to PAC codes, optimization of the number of layers and the payload capacity of each layer, introducing efficient methods for detecting errors in the decoding of individual layers of the inner PAC codes. There are also the more general GCC/MLC design problems of balancing the errorcorrection capability and implementation complexity of inner and outer codes. The present disclosure introduces methods to solve these design problems for GCC/MLC schemes with PAC inner codes.

[0012] If we compare the present principles with the concatenation scheme in [FAL1969], several major differences stand out. First, the concatenation scheme of [FAL1969] uses (conventional) convolutional codes as inner codes, while inner codes in the present disclosure are based on PAC codes. Convolutional codes have a uniform tree structure (often represented by a trellis), while PAC codes have a non-uniform tree structure, where the tree structure is designed to match channel polarization effects created by a polar transform. Second, the outer codes in the concatenation scheme of [FAL1969] are identical to each other, while the more general GCC/MLC concatenation methods employed by the present principles call for protecting each layer of the inner PAC code by a layer-specific outer code, where the layer-specific outer code is customized to the statistics of errors and erasures remaining at that layer after inner decoding. Third, the inner decoder in [FAL1969] is a standard sequential decoder for convolutional codes, while the inner decoder according to the present principles is a sequential decoder that is customized to channel polarization effects. The customization involves using a metric with a “look-ahead” capability and a non-uniform “bias”. The customization further involves introducing a “time-out rule” so as to curb excessive computation in sequential decoding, where the time-out rule is customized for the non-uniform structure of the PAC tree code. Other major differences between the prior art and the present principles will be elaborated in the sequel.

[0013] To summarize, the present disclosure introduces GCC/MLC methods that improve the practical utility of PAC codes by providing computational diversity to mitigate the adverse effects of the variability of computation in sequential decoding, while at the same time providing a PAC coding architecture that is capable of delivering extreme reliability and scalable throughput.

[0014] References:

[ARI2009] E. Arikan, “Channel polarization: A method for constructing capacity-achieving codes for symmetric binary-input memoryless channels,” IEEE Transactions on Information Theory, vol. 55, no. 7, pp. 3051-3073, Jul. 2009. [ARI2019a] E. Arikan, “Methods and apparatus for error correction coding with triangular factorization of generator matrices,” U.S. Patent Application No. 16453887, 26-Jun-2019.

[ARI2019b] E. Arikan, “From sequential decoding to channel polarization and back again,” arXiv: 1908.09594 [cs, math], 26 Aug. 2019.

[ARI2009] Arikan, E., & Markarian, G. (2009, July 13). Two-dimensional polar coding. Proc. Tenth International Symposium on Coding Theory and Applications (ISCTA ’09) . Ambleside, UK.

[ELI1954] Elias, P. (1954). Error-free Coding. Transactions of the IRE Professional Group on Information Theory, 4(4), 29-37.

[FAL1969] Falconer, D. D. (1969). A hybrid coding scheme for discrete memoryless channels. The Bell System Technical Journal, 48(3), 691-728.

[FAN1963] Fano, R. (1963). A heuristic discussion of probabilistic decoding. IEEE Transactions on Information Theory, 9(2), 64-74.

[FOR1965] Forney Jr, G. D. (1965). Concatenated Codes (Technical Report No. 440). Massachusetts Institute of Technology.

[JAC1967] Jacobs, I., & Berlekamp, E. (1967). A lower bound to the distribution of computation for sequential decoding. IEEE Transactions on Information Theory, 13(2), 167-174.

[MAH2016] Mahdavifar, H., El-Khamy, M., Lee, J., & Kang, I. (2016). Method and system for encoding and decoding data using concatenated polar codes (United States Patent No. US9362956B2).

[ZAB2013] Zabinski, P. J., Gilbert, B. K., & Daniel, E. S. (2013). Coming Challenges with Terabit- per-Second Data Communication. IEEE Circuits and Systems Magazine, 13(3), 10-20.

[ZYA1999] Zyablov, V., Shavgulidze, S., & Bossert, M. (1999). An Introduction to Generalized Concatenated Codes. European Transactions on Telecommunications, 10(6), 609-622.

The above-listed publications are incorporated herein by reference.

SUMMARY

[0015] In one embodiment, a concatenated encoder apparatus for use in a communication system includes an outer encoder configured to receive a concatenated encoder input block d, split the concatenated encoder input block d into an outer code input array a, and encode the outer code input array a in accordance with a plurality of outer codes to generate an outer code output array b, and an inner encoder configured to generate, from the outer code output array b, a concatenated code output array x in accordance with a layered polarization adjusted convolutional (LPAC) code, and send the concatenated code output array x to a channel. The plurality of outer codes comprises at least two outer codes and the LPAC code comprises at least two layers. The inner encoder is optionally further configured to compute a precoding array c from the outer code output array b and insert the precoding array c into the data container array v. The LPAC code optionally comprises a data index set c/Z and a partition of the data index set c/Z into a plurality of layer index sets where the plurality of layer index sets are chosen in accordance with a score function, and the score function is one of a Hamming score function, a reliability score function, a decoding order score function, or a combination thereof.

[0016] In another embodiment, a concatenated decoder apparatus for use in a communication system includes a layer counter configured to count a number of layers and an inner decoder configured to carry out an ith layer inner decoding operation in accordance with a layered polarization adjusted convolutional code (LPAC) to generate an ith inner decoder decision from a concatenated decoder input array y and an (i — 1)th cumulative decision feedback The concatenated decoder also includes an outer decoder configured to carry out an ith layer outer decoding operation to generate from the ith inner decoder decision an ith outer decoder decision . and a reencoder configured to carry out an ith layer reencoding operation to generate an ith decision feedback from the ith outer decoder decision , where the number of layers is equal to an integer m, the integer m is greater than one, and the outer encoder is further configured to generate a concatenated decoder output block from outer decoder decisions and send the concatenated decoder output block to a destination. The ith layer inner decoding operation optionally comprises employing a sequential decoder for decoding the LPAC code. The sequential decoder is optionally equipped with a computational time-out limit.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG. 1 is a block diagram illustrating a communication system 100 in which embodiments of the present principles may be used;

[0018] FIG. 2 is a flowchart of a concatenated encoder process according to the present principles; [0019] FIG. 3 is a flowchart of a concatenated decoder process according to the present principles;

[0020] FIG. 4 illustrates an example wireless network within which encoding and decoding of data using concatenated polarization adjusted convolutional codes may be implemented according to this disclosure;

[0021] FIG. 5A illustrates an example user equipment network within which encoding and decoding of data using concatenated polarization adjusted convolutional codes may be implemented according to this disclosure; and

[0022] FIG. 5B illustrates an example enhanced NodeB (eNB) network within which encoding and decoding of data using concatenated polarization adjusted convolutional codes may be implemented according to this disclosure.

DETAILED DESCRIPTION

[0023] FIGS. 1 through 5B, discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged communication system. [0024] Notation. For a subset of a universal set, denotes the complement of with respect to the universal set. For and any two subsets of a universal set, the notation denotes the set difference, namely, . For a set, denotes the number of elements in The symbol denotes the finite field with elements We write to indicate that a is a row vector we write a to denote the subvector a then is the null vector. We write a ^j instead of when i = 1. For denotes the subvector that consists of the elements of a with indices in likewise, ) denotes the subvector that consists of the elements of a with indices in the set S , where denotes the complement of in { ). For example, if N = 8 and < , then, = and = By convention, the coordinates of appear in in the increasing order; thus, whether <5 is specified as or , the subvector is the same vector . The notation stands for the finite field with elements . We use the notation to mean “a equals b by definition.”

[0025] For X a random variable (or a chance variable) and x a possible realization of X, the notation P _X (x) denotes the probability of the event {X = x}. For (X, Y) jointly distributed random variables and (x, y) a possible realization of the pair (X, Y), P _X,Y (x> y) denotes the probability of {X = x, Y = y}, and P _X,Y (y lx) denotes the conditional probability of {Y = y] given {X = x}.

[0026] We say that “ is a code over with dimension K and block length X" if is a mapping from to F written C The ratio R = K/N is called the rate of the code An encoder for the code C is any method or apparatus that implements the mapping . We refer to each element in the domain of C as an “input block” and each element in the range of as an “output block”. Input and output blocks of a code are also called “messages” and “code words”, respectively. We represent input and output blocks of a code by row vectors, such as and , respectively. We say that “x belongs to if there exists an input block d that gets mapped into x by . Sometimes we say that “x is the code word in corresponding to the input block d” if d is mapped into x by . We write to indicate that x is the code word in corresponding to the message block d.

[0027] PAC codes. We start with a review of the prior art on PAC coding to establish some basic concepts that will be needed in the presentation of the present principles. PAC codes were first disclosed, as a most preferred embodiment of TF codes, in E. Arikan, “Methods and apparatus for error correction coding with triangular factorization of generator matrices,” U.S. Patent Application No. 16/453,887, filed 26 Jun 2019, incorporated herein by reference. A tutorial discussion of PAC codes appears in the article E. Ankan, “From sequential decoding to channel polarization and back again,” arXiv: 1908.09594 [cs, math], 26 Aug. 2019. [0028] A PAC code over is a linear block code characterized by a collection of parameters , wherein N is > a blolk length, wherein for some integer n > 1, wherein K is a dimension, wherein the dimension K is an integer in the range 0 ≤ K ≤ N, wherein is a data index set, wherein the data index set is a subset of {1,2, ••• , N} with size wherein f is a frozen block, wherein the frozen block f is a fixed vector that belongs to wherein g is an impulse response of a convolution operation, wherein the convolution impulse response g is a fixed vector of the form , wherein , and M > 1.

[0029] The restrictions and M > 1 ensure that the trivial convolution operation corresponding to g = 1 (identity mapping) is excluded from the definition of PAC codes, which ensures that certain prior art codes, such as, polar codes and Reed-Muller codes, are excluded from the class of PAC codes.

[0030] The choice of the frozen block f is not a critical design issue; it may be set to an all-zero vector. The FER performance and decoding complexity of PAC codes depend critically on the choice of the data index set . U.S. Patent Application No. 16/453,887 describes several methods for constructing the data index set based on various “score functions”. Here, we present the score function approach in a slightly different but equivalent form.

[0031] A score function is any function s: {1,2, ••• , N} -> (real numbers) that assigns a real number (a score) to each index i ∈ {1,2, ••• , N}. Given a score function s, the data index set is chosen so that is maximized subject to and . Two important score functions for PAC code construction are the Hamming score function and the reliability score function.

[0032] The Hamming score function of an index is defined as s , wherein n = log ₂ N and are the coefficients in the binary representation of (t — 1), namely, . For example, sH(14)=3 since 14 — 1 = 13 = 1 + 22 + 23.

[0033] The reliability score function of an index i ∈ {1,2, ••• , N} is defined as s _R (i) = 1 — P _{e i} , wherein Pe i is defined as the probability of the event that a successive cancellation decoder for a polar code will make an error at the ith stage of decoding. The person skilled in the art will know that the quantities { P _{e i} } can be computed by standard polar code construction methods, such as the density-evolution method.

[0034] A drawback of the reliability score function is that it generates channel-specific PAC code designs. Channel-specific code designs may not work well if the channel model used in the code design does not match the characteristics of the channel 104 that is actually used. The Hamming score function, on the other hand, generates channel-independent designs. In the context of polar coding (namely, for g = 1), the person skilled in the art will recognize that the Hamming and reliability score functions generate Reed- Muller and polar codes, respectively. Based on this observation, it may be expected that the Hamming score function emphasizes code minimum distance in PAC code construction, while the reliability score function emphasizes PAC code constructions that are better adapted to channel polarization effects.

[0035] Next we review prior-art methods for encoding and decoding of PAC codes. For this, let CPAC be a fixed but otherwise arbitrary PAC code with parameters

[0036] Encoding of the PAC code comprises receiving an input block , generating a data container block from the input block by setting , generating a convolution output block from the data container block v by computing a convolution and generating an output block by applying a polar transform to the convolution output block u, wherein v,A is the sub vector of v comprising the coordinates in J wherein is the sub vector of comprising the coordinates in J wherein 0 is an all- zero vector of length N — K, wherein F = and wherein is the nth Kronecker power of F. The convolution is given by the formula wherein the addition and multiplication are in F2, wherein u _i is the ith element of u, v _k is the kth element of v, and v _k is interpreted as 0 if k ≤ 0.

[0037] To discuss decoding of the PAC code CPAC, suppose the output block x of the PAC code CPAC is transmitted over a channel and a channel output block y is received at the channel output. Let P denote the channel probability assignment, namely, the conditional probability that y is received at the channel output given that x is transmitted at the channel input. (Here, X and Y represent the random vectors at the channel input and output, respectively.) Suppose also that the PAC encoder input block d is chosen uniformly at random over . The uniform probability assignment on d and the channel probability assignment determine a joint probability assignment for the variables that appear below in sequential decoding of the PAC code CPAC.

[0038] We will discuss decoders for the PAC code CPAC by viewing decoders as tree search algorithms. To that end, we associate a code tree to the PAC code CPAC, wherein the code tree comprises an ith level for each integer i in the range 0 ≤ i ≤ N, wherein the ith level comprises a plurality of nodes, wherein each node at the ith level of the code tree is associated with an ith initial segment of the data container block , wherein is interpreted as a null vector, wherein the (t = O)th level of the code tree comprises a single node, called a root node, wherein the root node is associated with the null vector v°. The data index set determines the structure of the code tree. To each choice of the data index set , there corresponds a rate profile , wherein R _i is defined as the fraction of elements in {1,2, ••• , i} that belong to , namely, We interpret iR _i as the number of “free coordinates” in the ith initial segment (The rest of the coordinates of v ⁱ are constrained to 0 by the encoding rule ). Thus, the number of nodes at the ith level of the code tree is given by 2 , with the understanding that at level i = 0, there is only the root node.

[0039] The convolution mapping establishes a one-to-one correspondence between the initial segments v N of v and the initial segments . Hence, the nodes at the ith level of the code tree for the PAC code CPAC can be identified either by . In the following description, we will identify the nodes in the code tree by the initial segments v of the data container block v.

[0040] An encoding operation for the PAC code CPAC is equivalent to selecting a correct path through the code tree for the PAC code, wherein the correct path is the path that traverses the sequence of nodes v , corresponding to the initial segments of the data container block v. Equivalently, the correct path traverses the sequence of nodes u corresponding to the initial segments of the convolution output block u.

[0041] Decoding of the PAC code CPAC may be viewed as a search for the correct path in the code tree for CPAC. Given the channel output block y, a decoder searches the code tree and generates an estimate of the path along the actual data container block v at the encoder. Given an estimate of the data container block v, one extracts an estimate of the encoder input block d by setting

[0042] Clearly, any tree search method can serve as a decoder for the PAC code CPAC. U.S. Patent Application No. 16/453,887 discusses sequential decoding (a depth-first search heuristic), and mentions Viterbi decoding (a breadth-first search algorithm) and beam search (a suboptimal but less complex version of breadth-first search) as some alternatives to sequential decoding. The present disclosure is primarily based on sequential decoding of PAC codes.

[0043] Sequential decoding of PAC codes. Sequential decoding of the PAC code CPAC comprises a depth- first search for the correct path in the code tree for the PAC code CPAC, wherein the search is guided by a Fano metric wherein P ) is the conditional probability assignment on the channel output y given that the correct path passes through node is the probability assignment on the channel output block y, and Bt is an ith level cumulative bias term. As pointed out in U.S. Patent Application No. 16/453,887, the Fano metric can be computed incrementally by writing wherein is a Fano branch metric defined as wherein is a j th level bias term. The Fano branch metric can be written alternatively as which may be advantageous for numerical stability in computations. For successful operation of sequential decoding, the bias terms {bj} have to be chosen so that the Fano branch metric tends to increase on the correct path and decrease on incorrect paths.

[0044] The sequential decoding algorithm prioritizes its search in accordance with the value assigned by the Fano metric to the nodes in the code tree of the PAC code CPAC. There exist various versions of the sequential decoding algorithm, such as the “Fano” algorithm and the “stack” algorithm, which differ in implementation details. The stack algorithm is easier to explain but the Fano algorithm is more practical for implementation purposes. For details of both algorithms we refer to prior art on sequential decoding. For details of sequential decoding of PAC codes we refer to U.S. Patent Application No. 16/453,887. Here, we will only sketch the operation of the stack algorithm.

[0045] Stack algorithm. A stack is a data structure consisting of a variable number of records, where the records comprise a node id and a metric value. The records in the stack are maintained in sorted order with respect to their metric values, with the “top” node having the largest metric value. Initially, the stack is empty. The stack algorithm begins the tree search by inserting the root node u to the stack (as the top node) with a metric value . Clearly, the initial hypothesis about the actual root node u is correct since there is only one node at level 0. Next, the root node is removed from the stack top, each hypothetical continuation is inserted into the stack, and the stack is sorted again so as to maintain the order with respect to metric values. At a general step of the stack algorithm, the stack top contains a node at some level i in the code tree. The node is removed from the stack top, the metric values ) are computed for all possible continuations of , each new node is inserted into the stack, and the stack is sorted again with respect to metric values of the current nodes. The stack algorithm completes sequential decoding as soon as a node at the final level N of the code tree for the PAC code C _PAC appears at the stack top. At this point, we obtain an estimate of the convolution output block u. Since the convolution is one-to-one, we invert the convolution to obtain an estimate v of the data container block v such that and extract an estimate of the encoder input block d from by setting

[0046] As pointed out in the BACKGROUND, a major drawback of sequential decoding is the variability of computation. The variability of computation is caused by rare noise bursts leading to exponentially large searches in the code tree, giving rise to a heavy-tailed Pareto distribution for search complexity. This problem is especially severe for sequential decoding of conventional convolutional codes for which the channel is not surrounded by a polar transform operation and the metric has the form . The PAC codes partially alleviate the computation problem by using a metric of the form , where the replacement of y ⁱ by y provides some “look-ahead” feature into the metric. However, the variability of computation in sequential decoding of PAC codes still remains a main impediment to the practical applicability of PAC codes. As a remedy, the present principles introduce concatenated coding schemes along with layered PAC (LPAC) codes.

[0047] LPAC codes. An LPAC code over is a linear block code characterized by a collection of parameters , wherein A is a block length, wherein for some integer n > 1, K is a dimension, wherein the dimension K is an integer in the range 0 ≤ K ≤ N, wherein is a data index set, wherein the data index set J is a subset of } with size , wherein is an i th layer index set, , wherein ( is a plurality of layer index sets, wherein the plurality of layer index sets ( partition the data index set JI in the sense that J wherein f is a frozen block, wherein the frozen block f is a fixed vector that belongs to wherein g is an impulse response of a convolution operation, wherein the impulse response g is a fixed vector of the form g wherein

[0048] It should be clear from their definitions that an LPAC code with parameters can be thought of being derived from a PAC code with parameters by choosing a partition ( of JI. Conversely, a PAC code may be seen as an

LPAC code with only one layer, L = 1. The differences in the encoding of PAC codes and LPAC codes are minor. The layered structure of LPAC codes becomes significant only during decoding. The layered structure is designed for layered decoding, where external aid (from an outer decoder) may be received between the decoding of successive layers. For completeness, we give details of encoding and decoding of LPAC codes, although they are similar to the encoding and decoding of PAC codes.

[0049] Let C _LPAC be an LPAC code over with parameters , and let be an input block such that dt is a vector over F with length for each 1 ≤ i ≤ L. (Here, d ₁ stands for the first elements of d, d ₂ stands for the next elements of d, and so on.) Encoding of d into an output block comprises generating a data container block by setting and , generating a convolution output block from the data container block v by computing a convolution and generating an output block by applying a polar transform to the convolution output block it, namely, by setting , wherein is the sub vector of v comprising the coordinates in , wherein is the subvector of comprising the coordinates in J , wherein 0 is an all- zero vector of length N wherein and wherein is the nth Kronecker power of F. The convolution is given (using arithmetic) by the formula A, wherein u _i is the ith element of u, v _k is the kth element of v. and v _k is interpreted as 0 if k ≤ 0.

[0050] To illustrate layered decoding, of the LPAC code CLPAC , suppose d = (d1; d2 • • • , d _L ) is the encoder input (invisible to the decoder) and y is the channel output. Layered decoding begins by decoding a first-layer PAC code C ₁ derived from the first layer of the LPAC code and characterized by the parameters using an arbitrary PAC decoder to obtain an initial estimate of of the data container block v from a channel output block y, and extracting an initial estimate of the first layer data block by setting . (Note that a decoder for the LPAC code CLPAC does not have to produce the entire initial estimate in order to obtain , it suffices to produce only a partial initial estimate . This observation may be useful in reducing the complexity of layered decoding.)

[0051] The main advantage of layered decoding is to give an external agent (such as an outer code in a concatenated coding system) a chance to correct any errors in the initial estimate and provide a final estimate by utilizing some external information. The succeeding stages of layered decoding are carried out based on the assumption that then the layered decoder will never recover form this error; on the other hand, if is correct, the decoding problem reduces to a smaller (and easier) instance of a PAC decoding problem. Some layered decoders may receive an indication that is wrong, e.g., due to failure of certain parity-check bits or due to an outer decoder failing to produce a valid decoded output; in such cases, decoding of the LPAC code is aborted. If there is no such indication that is false, the decoder continues with the decoding of the second layer.

[0052] The second layer decoding is carried out on a second-layer PAC code C ₂ derived from the second layer of the LPAC code and characterized by the parameters wherein comprises the coordinates of and in a certain order as determined by the index sets and More precisely, is obtained by considering a vector with (the remaining coordinates of a are immaterial here) and setting [0053] Layered decoding continues with a decoding of the second-layer PAC code C , using the same type of decoding procedure as in the decoding of the first-layer PAC code C ₁ . The decoding of the second-layer PAC code begins with the output block y as decoder input and ends with an initial estimate of the second-layer data block . As in first-layer decoding, an external agent receives and provides a final estimate by utilizing some external information.

[0054] In general, in an ith round of decoding, the layered decoder decodes an ith-layer PAC code derived from the ith layer of the LPAC code and characterized by the parameters ( wherein comprises the coordinates of and in a certain order as determined by the index sets More precisely, is obtained by considering a vector , and setting . (Note that ) At the end of rounds of decoding, one obtains a final estimate and decoding is completed.

[0055] A critical aspect of the construction of LPAC codes is the selection of the data index set c/Z and the partition of the data index set into layer index sets The selection of the data index set can be carried out using the score-function approach as described above in connection with the construction of PAC codes. The partition of the data index set into layer index sets can also be carried out by the same type of score-function approach. Suppose a data index set c/Z is given and suppose one wishes to partition into a plurality of layer index sets with a prescribed number of layers L and a prescribed size for the ith layer index set for each 1 ≤ i ≤ L. The score function approach with a score function s: chooses the layer index sets one-by-one, in reverse order £ , so that £ maximizes over all sets ) such that L, we interpret as the null set.) Two preferred score functions for partitioning the data index set into a plurality of layer index sets are the Hamming and the reliability score functions, discussed above. A third score function for partitioning the data index set c/Z into a plurality of layer index sets ( is the decoding order score function s _D for which [0056] Note that it is possible that the data index set is chosen using one type of score function and the layer index sets are chosen using a different type of score function.

[0057] The above procedure for constructing the layer index sets treats the number of layers L and the sizes { of the layers as given. The choice of the parameters L and { depends on the type of outer codes that are used in the system.

[0058] We now turn to describing specific embodiments of the present principles with reference to FIGS.

1 through 5B.

[0059] FIG. 1 is a block diagram illustrating a communication system 100 according to an embodiment of the present principles. The term communication system is used here to include any kind of system for transmission or storage of data. Specific embodiments of the present principles described below are for illustration only. It will be apparent to the person skilled in the art that alternative embodiments of the present principles may be configured for reliable transmission or storage of data in a wide range of communication systems.

[0060] The main function of the communication system 100 is to carry data from a source to a destination by using a concatenated code C. The communication system 100 comprises a concatenated encoder 102, a channel 104, and a concatenated decoder 106. The concatenated encoder 102 receives from the source a concatenated encoder input block d via a concatenated encoder input port 130, encodes the concatenated encoder input block d (as described below) to generate a concatenated encoder output array x, and transmits x over the channel 104 via a channel input port 134. In response to the transmission of x, the channel 104 produces a concatenated decoder input array y at a channel output port 136. The concatenated decoder 106 receives and decodes y to generate a concatenated decoder output block d, and passes d to the destination via a concatenated decoder output port 144.

[0061] Ideally, the communication system 100 is such that the concatenated decoder output block is an exact replica of the concatenated encoder input block d. However, due to imperfections in the system and noise in the channel 104, does not always match d. A frame error is said to occur when i.e., when differs from d in at least one coordinate. A primary performance criterion for the communication system 100 is the frame error rate (FER), defined as the frequency with which the event occurs. The communication system 100 aims to reduce the FER by implementing a forward error correction coding (FEC) scheme, comprising the concatenated encoder 102 and the concatenated decoder 106.

[0062] Before turning to the details of the encoding and decoding operations in the communication system 100, it is worth pointing out that, typically, the channel 104 comprises a transmission medium as well as other modules, such as modulators, amplifiers, antennas, digital-to-analog and analog-to-digital convertors, signal acquisition and synchronization circuits, equalizers, etc., that are essential for transmitting and receiving information over the transmission medium but are not directly related to the present principles. It is also worth pointing out that the transmission medium may be a copper cable, an optical cable, or airwaves or some other type of physical medium over which information can be carried by modulating a transmitted signal, wherein the transmitted signal may be, e.g. , electrical, optical, or electromagnetic in nature. In some cases, the channel 104 may comprise a data storage device which allows information to be written into at one point in time and read out at a later point in time.

[0063] We now turn to the details of the communication system 100 to discuss an embodiment of the present principles where the concatenated code C is a code over with dimension K (bits), block length N (bits), and rate . The restriction of the concatenated code C to a code over the binary alphabet simplifies the presentation of the present principles. However, it will be clear to the person skilled in the art that the present principles can be extended to concatenated codes over non-binary alphabets.

[0064] Looking back at FIG. 1, we observe that the concatenated encoder 102 comprises an outer encoder 110 and an inner encoder 112. The concatenated encoder 102 further comprises a concatenated encoder control logic, a concatenated encoder input module, and a concatenated encoder output module, which are not shown in FIG. 1 in order not to clutter the figure with routine detail.

[0065] The outer encoder 110 is configured to encode a plurality of outer codes wherein m > 2 is a number of outer codes, wherein is an ith outer code, wherein the ith outer code is a code over a finite field with dimension (symbols from block length (symbols from ), and rate - wherein q _i is a size of a symbol alphabet for the ith outer code wherein is a power of two, , wherein is a symbol length (in bits) for the ith outer code wherein is an integer greater than or equal to 1, wherein the ith outer code dimension is an integer greater than or equal to 1, and wherein the ith outer code block length is an integer greater than or equal to K

[0066] While the dimension of the ith outer code may depend on i, the block length is common to all outer codes. Measured in bits, the ith outer code has dimension K and code block length The total number of bits that enter (per encoding cycle) the plurality of outer codes is - which must be the same as the length of the concatenated encoder input block so, The total number of bits at the output of the plurality of outer codes equals N Thus, the plurality of outer codes C has an effective rate [0067] The inner encoder 112 is configured to encode N _out identical copies of an inner code C _in , wherein the inner code is an LPAC code over F characterized by the parameters wherein the block length is given by for some integer , wherein the number of layers is L = m (the same as the number of outer codes), wherein the ith layer index set £ has a size , wherein p _i is the symbol length for the ith outer code and is a length of an ith layer precoding block (1 ≤ i ≤ m), wherein the impulse response g is a vector Thus, the code is a copy the LPAC code , and we will refer to as the j th inner code. [0068] In order to describe the concatenated encoder 102 in detail, we turn to FIG. 2 which displays a flowchart 200 illustrating the operation of the concatenated encoder 102. Steps 204, 206 and 208 are executed by the outer encoder 110, steps 210, 212, 214, 216, and 218 by the inner encoder 112, steps 202 and 220, as well as the transitions between the steps of the flowchart, are executed by the concatenated encoder control logic.

[0069] The concatenated encoder 102 starts operations in step 202 with the concatenated encoder control logic waiting for the concatenated encoder input block d to become available at the concatenated encoder input port 130. When the concatenated encoder input block d becomes available, the concatenated encoder control logic moves to step 204.

[0070] In step 204, the outer encoder 110 receives the concatenated encoder input block d at the concatenated encoder input port 130.

[0071] In step 206, the outer encoder 110 splits the concatenated encoder input block d = into to generate an outer code input array wherein and wherein The outer encoder 110 follows a natural order splitting rule, wherein the natural order splitting rule copies the bits of d to the bits of a in the natural order from left to right, namely, - The natural order splitting rule can be expressed compactly by the formula wherein

[0072] The natural order splitting rule has the advantage of being simple and easy to implement. However, the present principles are compatible with any other splitting rule that assigns the elements of d to the elements of a in any order desired.

[0073] In step 208, the outer encoder 110 carries out an outer code encoding operation on the outer code input array a to generate an outer code output array wherein

[0074] The outer code encoding operation comprises an ith outer code encoding operation for each integer i in the range 1 ≤ i ≤ m, wherein the t th outer code encoding operation comprises encoding an ith outer code input block a _i into an ith outer code output block b _i , wherein the ith outer code input block a _i is defined as the ith row of the outer code input array a and wherein the ith outer code output block b _i is defined as the ith row of the outer code output array b. More explicitly, and Thus, b _i is a codeword corresponding to in - The outer encoder 110 completes step 208 by sending b to the inner encoder 112 via the inner encoder input port 132.

[0075] Step 210 is an optional precoding step, which is kipped if no precoding is used. In step 210, the inner encoder 112 generates a precoding array from the outer code output array b, wherein . As we will see below, is carried in the ith layer of the jth inner code . There are many options in implementing step 210 within the framework of the present principles, as will be discussed in detail below. Here, we admit the most general form of precoding in which one sets wherein h _{j, i} can be any function from Note that in the special case where = 0 for each 1 ≤ i ≤ m, there is effectively no precoding.

[0076] In step 212, the inner encoder 112 generates a data container array from the outer code output array b and the precoding array c by setting ), wherein v and Note that, by construction, have the same size (in terms of the number of bits they may contain), and the assignment V is feasible. The present principles can be used with any specific representation of the symbol . as a sequence of bits as part of the assignment

[0077] In step 214, the inner encoder 112 applies a convolution operation on the data container array v to generate a convolution output array wherein wherein the convolution operation is defined, in terms of the impulse response of the LPAC code by the formula wherein the sum is over and wherein is interpreted as

[0078] In step 216, the inner encoder 112 applies a polar transform operation on the convolution output array u to generate the concatenated encoder output array x, wherein the concatenated encoder output array has a form , wherein In preferred embodiments of the present principles, the concatenated encoder output array is computed row-by-row by carrying out a polar transform operation n, wherein is the Kronecker power of F, , wherein is a jth row of x, and wherein is a jth row of u.

[0079] In step 218, inner encoder 112 sends the concatenated encoder output array x to the channel 104 via the channel input port 134. (Modulation and demodulation operations are regarded as part of the channel 104.)

[0080] In step 220, the concatenated encoder 102 enters a stop state. In case there is continuous encoding of data, step 220 may be eliminated and step 218 may be followed directly by step 202.

[0081] This completes the description of the concatenated encoder 102. Several remarks are in order before describing the concatenated decoder 106.

[0082] In the embodiment of the inner encoder 112 described above, the inner encoding mapping b -> x decouples into independent mappings wherein is the j th column of the outer encoder output array b. Hence, the inner encoding steps 210 through 216 can be carried out independently. One option is to implement each mapping in parallel by using dedicated hardware or software resources when speed is important. Alternatively, a single hardware or software may carry out the mappings sequentially if cost of implementation is important. The present principles offer a rich set of implementation options for the inner decoder 112, from fully-parallel to semi-parallel to fully-serial implementation, which can be used to trade hardware cost for throughput. On the other hand, the scope of the present principles is not limited by inner encoder mappings b -> x that decouple into N independent mappings the specific mapping given in connection with FIG. 2 is for illustration only. The person skilled in the art will be able to devise many other inner encoding mappings that can be with used without departing from the essential features of the present principles.

[0083] Step 210 admits any precoding rule of the form . An alternative is to use a “local” precoding function so that Cj depends only on b ^j . A second alternative is to use a “local and causal” precoding function . It is also possible to set 1 and allow only to be nonzero.

[0084] A local and causal precoding function has the advantage of allowing inner decoders to prune their search trees by detecting precoding violations as they carry out decoding. On the other hand, the general precoding rule admits precoding across the inner code input array and has the potential to detect errors more efficiently (hence improve the coding gain of the overall concatenated code). In the rest of the description, we will assume that a local and causal precoding function is used.

[0085] In general, it is advantageous to be able to detect errors as part of inner decoding and mark them as erasures since erasures offer a lesser challenge to the outer decoder 116 compared to undetected errors. On the other hand, error detection by precoding increases coding overhead, especially if the number of bits in the precoding block is significant compared to the inner code block length N _in . The precoding overhead can be quantified by the precoding rate which is the ratio of the number of bits before and after precoding. Optimizing the rate of precoding is a critical aspect of successful application of the present principles.

[0086] From the description of the inner encoder 112, it is seen that the concatenated encoder 102 receives bits and sends out bits. So, the concatenated code C has a rate R = - This rate can be written as a product where is the rate of (the code generated by) the outer encoder 110 and Rin = is the rate (of the code generated by) the inner encoder 112. Note that equals the product of the precoding rate and the LPAC code rate - Hence, the rate of the concatenated code C factors into a product of three rates [0087] We now look back at FIG. 1 and discuss the channel 104 in some more detail. In response to the transmission of the concatenated encoder output array x, the channel 104 produces the concatenated decoder input array wherein According to the model here, the channel 104 produces in response to the transmission of X and ideally, ; however, typically, y is a corrupted version of X _{j ,k} due to noise and other imperfections in the channel 104, and the relation between and is described by a probabilistic model.

[0088] The present principles use a probabilistic model of the communication channel 104, wherein the probabilistic model is characterized by a channel transition probability assignment , wherein is the conditional probability (or probability density) that the channel 104 produces the concatenated decoder input array y at the channel output port 136 given that the concatenated encoder output array x is transmitted at the channel input port 134. The present principles are most effectively applicable if the channel 104 conforms to a memoryless probabilistic model so that the channel transition probability assignment has a product form

[0089] While still looking at FIG. 1, we observe that the concatenated decoder 106 comprises an inner decoder 114, an outer decoder 116, and a reencoder 118. The concatenated decoder 106 further comprises a concatenated decoder control logic, which is not shown in FIG. 1 in order not to clutter the figure with routine detail.

[0090] The concatenated decoder 106 carries out a layered decoding operation on the concatenated code C, wherein the layered decoding operation comprises an ith layer decoding operation, wherein i is an integer in the range 1 , wherein m is the number of layers, wherein the ith layer decoding operation comprises an ith layer inner decoding operation, an ith layer outer decoding operation, and an ith layer reencoding operation, wherein the ith layer inner decoding operation is carried out by the inner decoder 114, wherein ith layer outer decoding operation is carried out by the outer decoder 116.

[0091] For details of the layered decoding operation, we turn to FIG. 3, which is a flowchart 300 illustrating an embodiment of the concatenated decoder 106. We will assume that a local and causal precoding function of the form is used.

[0092] The concatenated decoder 106 begins operations in step 302, with the concatenated decoder 106 in a start state, waiting for the concatenated decoder input array y to become available at the channel output port 136. When y becomes available, the concatenated decoder 106 moves to step 304 and receives y from the channel output port 136.

[0093] In step 306, the concatenated decoder 106 initializes a layer counter to i =1. The task of the layer counter is to keep track of a layer of concatenated code that is currently being decoded.

[0094] In step 308, with the layer counter value set to i, the inner decoder 114 receives y from the channel, receives an (t — l)th decision feedback from the reencoder 118, and decodes y using an cumulative decision feedback to generate an ith inner decoder decision b _i = \ wherein , are is a kth decision feedback produced by the reencoder 118 in a kth layer reencoding operation, and wherein is an estimate of the ith outer code output block . Note that in the first layer of concatenated decoding, with i = 1, the (t — l)th cumulative decision feedback is null; so, the inner decoder 114 can carry out the first layer of decoding using only y. Note also that, ideally, the ith inner decoder decision equals the ith outer code output block but due to noise in the channel 104 and other imperfections, occasionally, and will differ. When b fails match b _i , the present principles rely on the ith outer code Cout i to correct the errors in and supply an ith decision feedback that matches Accordingly, the ith decision feedback has a form that matches the form of , namely, wherein and wherein

[0095] Further details of inner decoder 114 are as follows. In step 308, with the layer counter value set to i , the inner decoder 114 executes, for each j = 1, 2, • • • , N _out , an ith layer inner decoding operation on a code wherein is a PAC code over with parameters wherein the frozen block is given by , wherein a is such that wherein Note that the causal nature of the precoding function is indispensable for implementing this step of the inner decoding operation.

[0096] For each the ith layer inner decoding operation on the inner code comprises generating using wherein is the j th row of y. In preferred embodiments of the present principles, the inner decoder 114 generates using a tree-search algorithm, such as a sequential decoder, as discussed below. When is ready for each , the inner decoder 114 completes step 308 by sending the ith inner decoder decision to the outer decoder 116.

[0097] Typically, the decision b is a symbol from the same symbol alphabet as . However, in some embodiments of the present principles, the inner decoder 114 may mark b as an erasure, e.g., when the inner decoder 114 fails to produce a that is consistent with the precoding blocks C , or when the inner decoder is equipped with a computational time-out limit and cannot complete decoding within the computational time-out limit.

[0098] In carrying out the ith layer inner decoding operation on the inner code the inner decoder 114 treats as a correct estimate of . If the decision feedback is not correct, the concatenated decoder 106 will never recover from such an error. In other words, the inner decoder 114 is not capable of correcting errors in the decision feedback. However, the outer decoder 116 will typically correct errors in the decision b . If the number of errors, namely, the number indices j for which , is small enough, the outer decoder 116 will be able to correct the errors and obtain a final decision j such that We now turn to the details of the outer decoder 116.

[0099] In step 310, with the layer counter value set to i, the outer decoder 116 executes an ith layer outer decoding operation on the ith outer code The outer decoder 116 receives the ith inner decoder decision from the inner decoder 114 at the outer decoder input port 138 and generates an ith outer decoder decision - Ideally, is an exact copy of the ith row of the outer decoder input array a. Sometimes the ith layer outer decoding operation may result in a decoding failure, e.g., when a bounded distance decoder is employed and the number of errors and/or erasures exceeds a certain threshold. When the outer decoder 116 detects a decoding failure, it sets an abort flag. In the absence of a decoding failure, the ith outer decoder decision has the form wherein wherein , and wherein is the dimension of the ith outer code and is the symbol length (in bits) for the ith outer code Ideally, we have for i j, k, wherein is the Zcth bit of the element a in the outer code input array a , as defined earlier.

[0100] In step 312, the concatenated decoder 106 checks if the abort flag is set; if the abort flag is set, decoding is aborted by executing step 314. Following an abort operation, the concatenated decoder 106 may move from step 314 to step 302 to start a new decoding cycle.

[0101] In step is 316, the concatenated decoder 106 checks if the mth (final) layer of decoding is completed. If the result is yes, a termination procedure is executed by entering step 322 (described below); if the check result is no, decoding continues with step 318.

[0102] In step 318, with the layer counter value set to i, the reencoder 118 carries out an ith layer reencoding operation, wherein the ith layer reencoding operation comprises encoding the ith outer decoder decision to generate an ith decision feedback and sending to the inner decoder 114 via the inner decoder input port 142, wherein the ith decision feedback s the codeword in the ith outer code corresponding to the ith outer decoder decision Thus, the ith layer reencoding operation is identical to the ith layer outer encoding operation carried out by the outer encoder 110.

[0103] In step 320, the concatenated decoder 106 increments the value of the layer counter i by 1 and proceeds to step 308 to initiate the decoding of the next layer.

[0104] In step 322, the outer decoder 116 generates the concatenated decoder output block from by setting where wherein is as definedw above in connection with step 310. This operation in step 322 is the inverse of the operation in step 210 of FIG. 2.

[0105] In step 324, the outer decoder 116 sends the concatenated decoder output block over the concatenated decoder output port 144 to the destination.

[0106] In step 326, the concatenated decoder 106 completes the layered decoding operation by entering a stop state. In some embodiments of the present principles in which one layered decoding operation is followed by another, step 326 may be eliminated and step 324 followed immediately by step 302 to initiate a new round of decoding.

[0107] This completes the description of the concatenated decoder 106. This also completes the discussion of the basic form of the present principles. We now turn to a most preferred embodiment of the present principles. [0108] A most preferred design methodology. Here we present a most preferred method for designing a concatenated code C in accordance with the present principles. We will assume that the primary design goal is to find a concatenated code C that meets a target rate R and a target FER . Consider an initial design for which that meets the target rate R. Below we show how to estimate the FER for such a design.

[0109] The first task is to estimate wherein is an i th layer symbol error rate for the inner code wherein is an ith layer symbol erasure rate for the inner code wherein is an ith layer undetected symbol error rate for the ith inner code wherein e denotes an erasure symbol, wherein the erasure symbol e can be any symbol which is not a member of the ith outer code symbol alphabet F wherein the ith layer symbol error rate and the ith layer symbol erasure rate are measured assuming that the decoder is fed the correct symbol values by a genie. It will be known to the person skilled in the art that such genie-aided analysis of error performance is common in the design of polar codes and here the same type of design method is employed.

[0110] Once the probabilities and are estimated for all i and j, the next step is to estimate the FER for the ith outer code for each i. Here, we use the bound P wherein (Φ _i is the probability of the event that , wherein is the minimum distance of the ith outer code Cout i and wherein t and s are, respectively, the number of undetected symbol errors and symbol erasures at the output of the plurality of ith layer inner codes . It is straightforward to compute Φ _i ;; in particular, if the parameters , and do not depend on the inner code index j, then the person skilled in the art will know that (Φ _i can be calculated as wherein the sum is over all pairs of non-negative integers t and s that satisfy .

[0111] Once (pi are calculated by the above formula or estimated in some other manner, one uses the union bound to obtain an upper bound on the FER for the concatenated code C. If the design goal on the FER ) is not met, one tries a new set of parameters. Finding a feasible design and improving it involves a considerable amount a search over the parameter spaces of the inner and outer codes.

[0112] The most preferred embodiment. In the most preferred embodiment of the present principles, the ith outer code is a Reed-Solomon code over the field , wherein the Reed-Solomon code may be a regular Reed-Solomon code with block length N or a shortened Reed-Solomon code with block length N , or an extended Reed-Solomon code with block length [0113] Reed-Solomon codes are minimum distance separable, so the i th outer code in the most preferred embodiment has a minimum distance The ith outer code is decoded using a bounded distance decoder (such as the Berlekamp-Massey algorithm), which is capable of correcting any combination of t errors and s erasures provided that

[0114] The inner code in the most preferred embodiment of the present principles is an LPAC code with as many layers as the number of outer codes. The most preferred method for selection of the plurality of data layer index sets is the reliability score function method.

[0115] Optionally, the inner encoder 112 employs precoding for error detection at the decoder. If the precoding option is used, the most preferred method of precoding is to use a cyclic redundancy check (CRC), which is a type of error detection method with low-complexity encoding and error-detection circuitry.

[0116] In the most preferred embodiment, the inner decoder 114 employs a sequential decoding algorithm. If the precoding option is employed by the inner encoder 112, then the inner decoder employs error detection and outputs erasure symbols when an error is detected.

[0117] In the most preferred embodiment, optionally, the sequential decoder employed by the inner decoder 114 is equipped with a time-out rule to curb excessive computation, wherein the time-out rule keeps a count of the number of times the sequential decoder visits a certain subset of nodes <5 in the code tree and stops (aborts) decoding if the count exceeds a certain prescribed limit Vmax. For example, <5 may be the set of all nodes in the code tree or the set of all nodes at a certain level i in the code tree. It is possible to apply several time-out rules concurrently. If the stack algorithm is used as a sequential decoder, the number of visits to nodes in <5 is well-defined since the stack algorithm cannot visit any node more than once. On the other hand, the Fano algorithm may visit a node multiple times (with different “threshold” values). For Fano algorithm, an alternative method of implementing the time-out rule is to count only the first visits to nodes in the set <5.

[0118] Examples. Below we present four examples of the most preferred embodiment of the present principles. The goal in giving these examples is to illustrate the practical utility of the present principles, in particular, the utility of LPAC codes as an effective inner coding method in GCC/MLC schemes. The examples also aim to illustrate that the precoding and computational time-out methods are effective components of the present principles for performance enhancement and decoder complexity reduction. We will first describe the common features of all four examples.

[0119] All examples show concatenated codes C that were designed to meet a target data rate R = 0.75 and a target FER 10-15. All concatenated codes C in the examples have the same block lengths N _out = 256, N _in = 128, and N = N _out N _in = 32,768; this makes a fair comparison between different designs possible.

[0120] The channel in the examples is a binary-input additive Gaussian noise (BI-AWGN) channel, with a product-form channel transition density function wherein wherein . The channel is operated at a signal-to-noise ratio (SNR) of 5.5 decibels (dB), where the SNR (in dB) is defined as S Thus, 5.5 dB SNR corresponds to (The BI-AWGN channel described here is a model for Binary Phase Shift Keying (BPSK) modulation.)

[0121] In the examples, the outer codes are extended Reed-Solomon codes over with a block length = 256. The number of outer codes m is fixed as and the dimensions of the outer codes are left as free design parameters. The ith outer code C is decoded using a bounded distance decoder, which is capable of correcting any combination of t errors and s erasures provided that

[0122] The inner code Cin in the examples is a LPAC code over F2 with block length N layers, impulse response g = (1,0, 1,1, 0,1,1), and frozen block The data index set and the layer index sets of the inner code C are selected using the reliability score function, where the reliabilities are calculated by the density-evolution method for the BI-AWGN channel at an operating SNR of 5.5 dB. The layer index sets in all four examples are as follows:

[0123] The inner decoder in the examples is a Fano sequential decoder. In all examples below, a time-out rule is applied with a bound Vmax on the number of visits to all nodes in the code tree and where each visit to each node is counted (not just the first visits).

[0124] The design methodology in the examples involves simulations to estimate symbol error probability V _{i ,j} and the symbol erasure probability at the output of the inner code Here, the parameters and δ _{i ,j} do not depend on the index j due to symmetry in the BI-AWGN channel and BPSK modulation, hence, we simplify the notation and write V _i and instead of V _{i ,j} and δ _{i ,j}

[0125] To estimate the undetected symbol error rate V _i and the estimated symbol erasure rate δ _i , simulations were carried out until two hundred undetected symbol errors or symbols erasures were observed, or until the number of trials reached one million. In some cases, the probabilities V _i and are too small to be estimated by simulation in practice. In such cases, we used conservative upper bounds based on density estimation method to estimate V _i and Once the probabilities V _i and are estimated for all i, we chose the dimensions so that is smaller than the target FER, where the FER for the ith outer code C We calculated (Φ _i using the formula given above.

[0126] Example 1. In the first example, the inner code is a LPAC code with block-length N _in = 128, dimension K _in = 104, and number of layers m = 13. The plurality of outer codes are extended Reed-Solomon codes over with block length and dimensions m] as listed in the second column of Table 1. (For i = 12, 13, the ith outer code has rate 1; in other words, layers 13, 14 are not protected by an outer code. So, it is actually possible to combine the layers 12, 13, 14 into a single layer, and view the combined layer as a single layer with a symbol length 8+8 = 16 bits.)

[0127] The symbol lengths for the outer codes are = 8, as shown in the third column of Table 1. There is no precoding in this example, so the precoding block lengths are set to 0 as also shown in the third column of Table 1.

[0128] The inner decoder is a sequential decoder with a time-out limit Vmax = 5,000 · N _in = 640,000 on the number of visits to all nodes in the code tree. The fourth column of Table 1 shows , where Vave is the average, over all simulation runs, of number of nodes visited in the code tree. (Each visit to each node is counted without exception, not just the first visits.) We observe that the mean computation is far from

[0129] The fifth and sixth columns of Table 1 show the estimated undetected symbol error rate v _i and the estimated symbol erasure rate δ _i for each layer 1 ≤ i ≤ 13. Since there is no precoding in this example; error-detection by mean of precoding is not possible. However, erasures could still occur because of the time-out limit Vmax. The fact that = 0 at all layers is an indication that Vmax = 640,000 is a loose bound on computational complexity.

[0130] For layers seven to thirteen, one million trials simulation produced no undetected errors or erasures; so, we used a conservative analytical upper bound as mentioned above. Those analytical estimates are marked with a “*” in the sixth column of Table 1.

[0131] The FER values (Φ _i in the seventh column of Table 1 were obtained by the formula given above. The sum equals 1.32 · 10-16, which shows that the FER for the concatenated code in this example satisfies the target FER 10-15.

[0132] As for the code rate, the final concatenated code has dimension , code block length N = N _out N _in = 32,768, and rate R = K/N = 0.750. The Shannon limit on the minimum required SNR for achieving a data rate of R = 0.750 on the BI-AWGN channel (allowing arbitrarily large block lengths) is 3.381 dB; thus, the gap to Shannon limit for the concatenated code in this example is around 2.119 dB.

Table 1. Parameters for the first example of the most preferred embodiment.

[0133] Example 2. The second example is the same as the first example except here we use precoding with a 4-bit CRC with impulse response polynomial g (x) = 1 + x + x4. The CRC checks on the entire data payload of the inner code and the CRC bits are inserted into the final layer (layer 13) of the inner code, as shown in the last entry of the second column of Table 2. The CRC makes it possible to mark some of the errors at the inner decoder output as erasures, which in turn increases the efficiency of the outer codes.

[0134] The simulation results for the third example are presented in Table 2. The sum equals 3.08- 10-16, which shows that the FER for the concatenated code in this example satisfies the target FER 10-15. The concatenated code in this example has dimension K , block length N = 32,768, and rate R = K/N = 0.772. The Shannon limit on the minimum required SNR for achieving R = 0.772 on the BI-AWGN channel is 3.686 dB; thus, the gap to Shannon limit for the concatenated code in this example is estimated as 1.814 dB.

[0135] This second example demonstrates that a CRC may narrow the gap to Shannon limit by helping mark some errors as erasures and enabling the outer decoder to recover from a larger number of errors left over by the PAC code. In general, a b-bit CRC will fail to detect a fraction 2~b of the symbol errors at the output of the inner code. The length b of the CRC has to be chosen with care; a small b means less precoding overhead but will not be as effective as a larger b in detecting errors.

Table 2. Parameters for the second example of the most preferred embodiment. 7 251 (8,0) 1.52 *1.07E-08 *1.61E-07 3.43E-18

8 252 (8,0) 1.46 *2.82E-10 *4.24E-09 2.86E-21

9 254 (8,0) 1.41 *5.74E-12 *8.60E-ll 3.33E-17

10 254 (8,0) 1.38 *1.50E-13 *2.25E-12 2.28E-20

11 255 (8,0) 1.33 *1.06E-19 *1.60E-18 2.72E-17

12 256 (8,0) 1.28 *7.80E-25 *1.17E-23 3.19E-21

13 256 (4+4) 1.25 *2.91E-36 *4.37E-35 1.19E-32

[0136] Example 3. The third example is the same as the first example except here we set 1024. The simulation results for the third example are presented in Table 3. The sum i equals 4.33- 10-16, which shows that the FER for the concatenated code in this example satisfies the target FER 10-15. [0137] The concatenated code has dimension block length N = 32,768, and rate R = K/N = 0.749. The Shannon limit on the minimum required SNR for achieving R = 0.749 on the BI-AWGN channel is 3.371 dB; thus, the gap to Shannon limit for the concatenated code in this example is estimated as 2.129 dB.

[0138] It is noteworthy that the code rate, gap to capacity, and average computation Vave/N _in in this example are all close to the corresponding quantities in the first example, despite having here a much tighter time-out limit Vmax. The tighter computational time-out limit manifests itself in producing erasures as a result of decoder time-outs. Such time-outs are especially significant at higher layers where they become the dominant determinant of inner code performance. Note that in this example, simulations produced measured errors/erasures at all layers, so there was no need to use analytical bounds. Table 3. Parameters for the third example of the most preferred embodiment. 13 252 (8,0) 1.25 0.00 3.00E-06 2.14E-18

[0139] Example 4. The fourth example is the same as the first example, except here we use the same 4-bit CRC as in the second example and set V _max = 8 · N _in = 1024 as in the third example. The simulation results for the fourth example are presented in Table 4. The sum equals 2.9T 10-16, which shows that the FER for the concatenated code in this example satisfies the target FER 10-15. The concatenated code in this example has dimension block length N = 32,768, and rate R = K/N = 0.765. The Shannon limit on the minimum required SNR for achieving R = 0.765 on the BI- AWGN channel is 3.585 dB; thus, the gap to Shannon limit for the concatenated code in the example is estimated as 1.915 dB.

[0140] Compared to the first and third examples, we see a significant improvement in the gap to capacity, which is explained by the presence of precoding. Compared to the second example, there is a slight degradation in gap to capacity, which shows that using a tight time-out limit did not significantly degrade performance. We also observe that the time-out mechanism made itself felt in decoding the initial layers, while the CRC was effective in detecting errors at the final layers. So, the two methods complemented each other in generating erasures.

Table 4. Parameters for the fourth example of the most preferred embodiment.

[0141] Additional Implementation Details

[0142] We have given four examples to illustrate the most preferred embodiment of the present principles. The following describes some alternative embodiments of the present principles that are not covered by these examples. [0143] The most preferred embodiment was described with respect to a sequential decoder as the inner decoder for PAC codes. Sequential decoders are depth-first search algorithms originally designed for decoding of convolutional codes. The person skilled in the art will recognize that it is also possible to decode the inner PAC codes by adapting various other decoding methods originally designed for convolutional coding , such as breadth-first search algorithms, including Viterbi decoding or Viterbi decoding with a list of candidate paths per state or beam search algorithms similar to successive cancellation list decoding for polar codes.

[0144] In the most preferred embodiment of the present principles, time-out rules have been enforced by a time-out limit Vmax. An alternative is to switch from the ith layer inner decoding to the decoding of the ith outer code as soon as the number of ith layer inner decoders that have completed their decoding tasks exceed a certain threshold.

[0145] In the second and fourth examples above, a single precoding block was placed in the final layer of the LPAC code. Such a precoding block provides a check on all layers; however, the sequential decoder for the inner code has to complete its search before it can utilize the precoding block for error detection. An alternative is to use several precoding blocks that are distributed to several layers to speedup error detection. [0146] The most preferred embodiment was described with respect to a bounded distance decoder for the outer Reed-Solomon codes. In alternative implementations, the bounded distance decoder may be replaced by a more powerful decoder, such as a Generalized Minimum Distance (GMD) decoder, which is a type of decoder that can utilize soft information provided by the inner decoder.

[0147] The present principles were presented with respect to inner codes over the binary alphabet F2 = {0,1}. The person skilled in the art will have no difficulty in generalizing the present principles to the case of inner codes over non-binary alphabets.

[0148] The present principles were presented with respect to non-systematic encoding of the inner LPAC codes. It is possible to implement the present principles with a systematic encoding of the inner LPAC codes.

[0149] The present principles were presented with respect to the case where the inner LPAC code has a block length N _in that is a power of two. An alternative is to use PAC code shortening and puncturing methods to adjust the block length N _in to any desired value by using the methods as disclosed in “E. Arikan, U.S. Patent Application No. 16700972, 2-Dec-2019”, incorporated herein by reference.

[0150] This completes the description of various embodiments of the present principles. We now turn to some examples of communication systems within which the present principles may be used. The present principles can be used in any type of communication or storage system where protection of data with high reliability is required. Examples of such systems include wireless and wireline communication systems (including satellite and optical communications) and computer memory or cloud storage systems.

[0151] FIG. 4 illustrates an example wireless network within which encoding and decoding of data using concatenated polarization adjusted convolutional codes may be implemented according to this disclosure. The embodiment of the wireless network 400 shown in FIG. 4 is for illustration only. Other embodiments of the wireless network 400 could be used without departing from the scope of this disclosure. The wireless network 400 includes an eNodeB (eNB) 401, an eNB 402, and an eNB 403. The eNB 401 communicates with the eNB 402 and the eNB 403. The eNB 401 also communicates with at least one Internet Protocol (IP) network 430, such as the Internet, a proprietary IP network, or other data network.

[0152] Depending on the network type, other well-known terms may be used instead of “eNodeB” or “eNB,” such as “base station”, “BS”, or “access point.” For the sake of convenience, the terms “eNodeB” and “eNB” are used in this patent document to refer to network infrastructure components that provide wireless access to remote terminals. Also, depending on the network type, other well-known terms may be used instead of “user equipment” or “UE,” such as “mobile station” (or “MS”), “subscriber station” (or “SS”), “remote terminal,” “wireless terminal,” or “user device.” For the sake of convenience, the terms “user equipment” and “UE” are used in this patent document to refer to remote wireless equipment that wirelessly accesses an eNB, whether the UE is a mobile device (such as a mobile telephone or smartphone) or is normally considered a stationary device (such as a desktop computer or vending machine).

[0153] The eNB 402 provides wireless broadband access to the network 430 for a first plurality of user equipments (UEs) within a coverage area 420 of the eNB 402. The first plurality of UEs includes a UE 411, which may be located in a small business (SB); a UE 412, which may be located in an enterprise (E); a UE 413, which may be located in a WiFi hotspot (HS); a UE 414, which may be located in a first residence (Rl); a UE 415, which may be located in a second residence (R2); and a UE 416, which may be a mobile device (M) like a cell phone, a wireless laptop, a wireless personal digital assistant (PDA), tablet, or the like. The eNB 403 provides wireless broadband access to the network 430 for a second plurality of UEs within a coverage area 425 of the eNB 403. The second plurality of UEs includes the UE 415 and the UE 416. In some embodiments, one or more of the eNBs 401-403 may communicate with each other and with the UEs 411-416 using 3G, 4G or 5G, long-term evolution (LTE), LTE-A, WiMAX, or other advanced wireless communication techniques.

[0154] Dotted lines show the approximate extents of the coverage areas 420 and 425, which are shown as approximately circular for the purposes of illustration and explanation only. It should be clearly understood that the coverage areas associated with eNBs, such as the coverage areas 420 and 425, may have other shapes, including irregular shapes, depending upon the configuration of the eNBs and variations in the radio environment associated with natural and man-made obstructions.

[0155] As described in more detail below, one or more of eNB 401, eNB 402 and eNB 403 include 2D antenna arrays that can be used in conjunction with embodiments of the present disclosure. In some embodiments, one or more of eNB 401, eNB 402 and eNB 403 support the codebook design and structure for systems having 2D antenna arrays.

[0156] Although FIG. 4 illustrates one example of a wireless network 400, various changes may be made to FIG. 4. For example, the wireless network 400 could include any number of eNBs and any number of UEs in any suitable arrangement. Also, the eNB 401 could communicate directly with any number of UEs and provide those UEs with wireless broadband access to the network 430. Similarly, each eNB 402-403 could communicate directly with the network 430 and provide UEs with direct wireless broadband access to the network 430. Further, the eNB 401, 402, and/or 403 could provide access to other or additional external networks, such as external telephone networks or other types of data networks.

[0157] The example channel decoding systems depicted in the figures and described above may be implemented in an eNB (such as eNB 402) and/or a UE (such as UE 416), as described in further detail below.

[0158] FIG. 5A illustrates an example user equipment network within which encoding and decoding of data using concatenated polarization adjusted convolutional codes may be implemented according to this disclosure. The embodiment of the UE 416 illustrated in FIG. 5 A is for illustration only, and the UEs 411- 416 of FIG. 4 could have the same or similar configuration. However, UEs come in a wide variety of configurations, and FIG. 5A does not limit the scope of this disclosure to any particular implementation of a UE.

[0159] The UE 416 includes an antenna 505, a radio frequency (RF) transceiver 510, transmit (TX) processing circuitry 515 (which may include the concatenated encoder 102 in FIG. 1), a microphone 520, and receive (RX) processing circuitry 525 (which may include the concatenated decoder 106 in FIG. 1). The UE 416 also includes a speaker 530, a main processor 540, an input/output (I/O) interface (IF) 545, a keypad 550, a display 555, and a memory 560. The memory 560 includes a basic operating system (OS) program 561 and one or more applications 562. Either the OS program 561, one of the applications 562, or some combination thereof may implement programming for employing error correction coding as described in the various embodiments of FIGS. 1 through 3.

[0160] The RF transceiver 510 receives, from the antenna 505, an incoming RF signal transmitted by an eNB of the network 400. The RF transceiver 510 may down-convert the incoming RF signal to generate an intermediate frequency (IF) or baseband signal which would be sent to the receiver (RX) processing circuitry 525. The RX processing circuitry 525 transmits the processed signal to the speaker 530 (such as for voice data) or to the main processor 540 for further processing (such as for web browsing data).

[0161] The transmit (TX) processing circuitry 515 receives, as at least some input data for the source data block, analog or digital voice data from the microphone 520 or other outgoing baseband data (such as web data, e-mail, or interactive video game data) from the main processor 540. The TX processing circuitry 515 implements encoding. The RF transceiver 510 receives the outgoing processed baseband or IF signal from the TX processing circuitry 515 and up-converts the baseband or IF signal to an RF signal that is transmitted via the antenna 505.

[0162] The main processor 540 can include one or more processors or other processing devices and execute the basic OS program 561 stored in the memory 560 in order to control the overall operation of the UE 416. For example, the main processor 540 could control the reception of forward channel signals and the transmission of reverse channel signals by the RF transceiver 510, the RX processing circuitry 525, and the TX processing circuitry 515 in accordance with well-known principles. In some embodiments, the main processor 540 includes at least one programmable microprocessor or microcontroller, while in other embodiments the main processor includes dedicated circuitry (e.g., for systematic and/or non-systematic encoding or decoding processes, shortening processes, data mapping, etc.) as well as (optionally) programmable logic or processing circuits.

[0163] The main processor 540 is also capable of executing other processes and programs resident in the memory 560, such as operations for channel quality measurement and reporting for systems having 2D antenna arrays. The main processor 540 can move data and/or instructions into or out of the memory 560 as required by an executing process. In some embodiments, the main processor 540 is configured to execute the applications 562 based on the OS program 561 or in response to signals received from eNBs or an operator. The main processor 540 is also coupled to the I/O interface 545, which provides the UE 416 with the ability to connect to other devices such as laptop computers and handheld computers. The I/O interface 545 is the communication path between these accessories and the main controller 540.

[0164] The main processor 540 is also coupled to the keypad 550 (which may simply be a single button or may be an array or other set of buttons) and the display unit 555. The operator of the UE 416 can use the keypad 550 to enter data into the UE 416. The display 555 may be a touch screen display or other display capable of rendering text and/or at least limited graphics, such as from web sites, and receiving touch inputs by a user in accordance with known practices.

[0165] The memory 560 is coupled to the main processor 540, and at least a part of the memory 560 could include a random access memory (RAM), and another part of the memory 560 could include a Flash memory or other read-only memory (ROM).

[0166] Although FIG. 5 A illustrates one example of UE 416, various changes may be made to FIG. 5 A. For example, various components in FIG. 5A could be combined, further subdivided, or omitted and additional components could be added according to particular needs. As a particular example, the main processor 540 could be divided into multiple processors, such as one or more central processing units (CPUs), one or more application specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), and one or more graphics processing units (GPUs). Also, while FIG. 5A illustrates the UE 416 configured as a mobile telephone or smartphone, UEs could be configured to operate as other types of mobile or stationary devices.

[0167] FIG. 5B illustrates an example enhanced NodeB (eNB) network within which encoding and decoding of data using concatenated polarization adjusted convolutional codes may be implemented according to this disclosure. The embodiment of the eNB 402 shown in FIG. 5B is for illustration only, and other eNBs of FIG. 4 could have the same or similar configuration. However, eNBs come in a wide variety of configurations, and FIG. 5B does not limit the scope of this disclosure to any particular implementation of an eNB. It is noted that eNB 401 and eNB 403 can include the same or similar structure as eNB 402.

[0168] As shown in FIG. 5B, the eNB 402 includes multiple antennas 570a-570n, multiple RF transceivers 572a-572n, transmit (TX) processing circuitry 574, and receive (Rx) processing circuitry 576. In certain embodiments, one or more of the multiple antennas 570a-570n include 2D antenna arrays. The eNB 402 also includes a controller/processor 578, a memory 580, and a backhaul or network interface 582. [0169] The RF transceivers 572a-572n receive, from the antennas 570a-570n, incoming RF signals, such as signals transmitted by UEs or other eNBs. The RF transceivers 572a-572n down-convert the incoming RF signals to generate IF or baseband signals. The IF or baseband signals are sent to the Rx processing circuitry 576, which generates processed signals by filtering, decoding, and/or digitizing the baseband or IF signals. The Rx processing circuitry 576 transmits the processed signals to the controller/ processor 578 for further processing.

[0170] The TX processing circuitry 574 receives, at least some input data from the concatenated encoder 102. The TX processing circuitry 574 implements circuits to encode, multiplex, and/or digitize the outgoing baseband data to generate processed signals. The RF transceivers 572a-572n receive the outgoing processed signals from the TX processing circuitry 574 and up-converts the baseband or IF signals to RF signals that are transmitted via the antennas 570a-570n.

[0171] The controller/processor 578 can include one or more processors or other processing devices that control the overall operation of the eNB 402. For example, the controller/processor 578 could control the reception of forward channel signals and the transmission of reverse channel signals by the RF transceivers 572a-572n, the Rx processing circuitry 576, and the TX processing circuitry 574 in accordance with well- known principles. The controller/processor 578 could support additional functions as well, such as more advanced wireless communication functions. Any of a wide variety of other functions could be supported in the eNB 402 by the controller/processor 578. In some embodiments, the controller/ processor 578 includes at least one microprocessor or microcontroller, while in other embodiments the main processor includes dedicated circuitry (e.g., for encoding and decoding processes, code puncturing and/or shortening processes, data mapping, etc.) as well as (optionally) programmable logic or processing circuits.

[0172] The controller/processor 578 is also capable of executing programs and other processes resident in the memory 580, such as a basic OS. The controller/processor 578 is also capable of supporting channel quality measurement and reporting for systems having 2D antenna arrays. In some embodiments, the controller/processor 578 supports communications between entities. The controller/processor 578 can move data and/or instructions into or out of the memory 580 as required by an executing process.

[0173] The controller/processor 578 is also coupled to the backhaul or network interface 582. The backhaul or network interface 582 allows the eNB 402 to communicate with other devices or systems over a backhaul connection or over a network. The interface 582 could support communications over any suitable wired or wireless connection(s). For example, when the eNB 402 is implemented as part of a cellular communication system (such as one supporting 3G, 4G, 5G, LTE, or LTE-A), the interface 582 could allow the eNB 402 to communicate with other eNBs over a wired or wireless backhaul connection. When the eNB 402 is implemented as an access point, the interface 582 could allow the eNB 402 to communicate over a wired or wireless local area network or over a wired or wireless connection to a larger network (such as the Internet). The interface 582 includes any suitable structure supporting communications over a wired or wireless connection, such as an Ethernet or RF transceiver. [0174] The memory 580 is coupled to the controller/processor 578. Part of the memory 580 could include a RAM, and another part of the memory 580 could include a Flash memory or other ROM. In certain embodiments, a plurality of instructions is stored in memory. The instructions are configured to cause the controller/processor 578 to perform the systematic and/or non-systematic encoding or decoding processes, shortening processes, data mapping, etc.

[0175] Although FIG. 5B illustrates one example of an eNB 402, various changes may be made to FIG. 5B. For example, the eNB 402 could include any number of each component shown. As a particular example, an access point could include a number of interfaces 582, and the controller/processor 578 could support routing functions to route data between different network addresses. As another particular example, while shown as including a single instance of TX processing circuitry 574 and a single instance of Rx processing circuitry 576, the eNB 402 could include multiple instances of each (such as one per RF transceiver).

[0176] While particular embodiments of METHODS AND APPARATUS FOR ENCODING AND DECODING OF DATA USING CONCATENATED POLARIZATION ADJUSTED CONVOLUTIONAL CODES are herein described in detail and depicted in the drawings, it is to be understood that the subject matter which is encompassed by the present disclosure is limited only by the claims. Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications that fall within the scope of the appended claims. The description in the present application should not be read as implying that any particular element, step, or function is an essential or critical element which must be included in the claim scope: the scope of patented subject matter is defined only by the allowed claims. Moreover, none of these claims are intended to invoke 35 USC § 112(f) with respect to any of the appended claims or claim elements unless the exact words “means for” or “step for” are explicitly used in the particular claim, followed by a participle phrase identifying a function. Use of terms such as (but not limited to) “mechanism,” “module,” “device,” “unit,” “component,” “element,” “member,” “apparatus,” “machine,” “system,” “processor,” or “controller” within a claim is understood and intended to refer to structures known to those skilled in the relevant art, as further modified or enhanced by the features of the claims themselves, and is not intended to invoke 35 U.S.C. § 112(f).