Title:
SHIFT REGISTER, DISPLAY DEVICE, AND METHOD FOR CONTROLLING SHIFT REGISTER
Document Type and Number:
WIPO Patent Application WO/2020/115841
Kind Code:
A1
Abstract:
The present invention uses a shift register having a structure in which a plurality of unit circuits are connected in cascade as a scanning line drive circuit of a display device. Each unit circuit includes: a plurality of control transistors; an internal node connected to a terminal of the control transistors; and a depletion mode initialization transistor including a first conduction terminal, a second conduction terminal, and a control terminal, the depletion mode initialization transistor being connected to the internal node directly or via a resistor. One of a power supply voltage and a ground voltage is applied to the second conduction terminal, and the other one of the voltages is applied to the control terminal. The initializing transistor is turned on in a power-off state.
Inventors:
TAYA NOBUYUKI
Application Number:
PCT/JP2018/044749
Publication Date:
June 11, 2020
Filing Date:
December 05, 2018
Export Citation:
Assignee:
SHARP KK (JP)
International Classes:
G09G3/20; H03K3/356; G09G3/3233; G11C19/28
Foreign References:
| JPS61157113A | 1986-07-16 | |||
| JPH0213963B2 | 1990-04-05 | |||
| JPS54159153A | 1979-12-15 | |||
| JPH0340535B2 | 1991-06-19 | |||
| JP2016181704A | 2016-10-13 | |||
| JP2003332892A | 2003-11-21 | |||
| JP2005038482A | 2005-02-10 | |||
| JPH07262775A | 1995-10-13 |
Attorney, Agent or Firm:
SHIMADA, Akihiro et al. (JP)
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