DESCRIPTION

TECHNICAL FIELD

The present invention relates to the extraction of features from signals provided by sensors.

STATE OF THE ART

As is known, signal features (in the time domain, frequency domain and time-frequency domain) are relevant indicators for the analysis and characterisation of a signal acquired in raw form from a sensor.

According to current methods, the activities of data acquisition, signal processing and feature extraction are performed using a device obtained from 'general purpose' computers or by assembling several data acquisition and calculation units. Sometimes, the acquisition and computation chain is distributed among several devices, causing burdensome data transmission activities.

The resulting computational architecture acquires signals (indicative, for example, of a mechanical vibration or an electric current) from a physical system and converts them into digital data from which features can be extracted, using signal processing techniques. In this way, it is possible to represent a considerable amount of measurements with a limited set of values and according to specific metrics.

The signal features obtained can be used to synthesise and analyse specific properties of the original signal, obviating the need to evaluate the entire set of original samples, and allow the health of a physical system to be assessed in order to improve maintenance activities and reduce the amount of data transmitted without losing critical information. Another important use is that of biomedical signals, the synthesis of which via features can be used to assess the health status of an individual over time.

According to traditional techniques., signal acquisition and feature extraction is carried out by means of general purpose hardware, which also handles any filtering operations. Sometimes this filtering operation is performed by a separate device from the computer in charge of feature exfraction.

General-purpose hardware requires programming operations on the part of the user for the purpose of calculating features, which can be particularly onerous. The complexity of the design and development of the calculation solution increases as the frequency required to extract features from the acquired signals increases. In addition, general purpose hardware involves relatively high cost, space occupancy and power consumption.

Document EP-A-1049050 describes a methodology for monitoring machines with different devices performing different operations to identify the health status of a monitored system.

Document US-A-10502594 discloses a portable transducer equipped with sensors, analogue and digital processing units to monitor the condition of an apparatus.

SUMMARY OF THE INVENTION

The present invention addresses the problem of providing a device for acquiring signals provided by sensors and extracting signal features that requires for its use configuration operations that are less complex and onerous than those provided for devices of the known art.

The present invention relates to an integrated circuit as defined in independent claim 1 and to particular embodiments thereof as defined in dependent claims 2-17.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is hereinafter described in detail, by way of example and not limitation, with reference to the accompanying drawings, in which:

- figure 1 schematically sho ws a form of embodiment of a signal detection and processing system comprising a signal processing integrated circuit having a pre-processing module and a feature extraction module;

- Figure 2 schematically shows another embodiment of a signal processing integrated circuit having a feature extraction module

DETAIL.ED DESCRIPTION

Figure 1 schematically shows an implementation form of a signal detection and processing system 1000 comprising a signal processing integrated circuit 100 and a plurality of sensors 200. The signal processing integrated circuit 100 (hereinafter, for brevity, integrated circuit 100) comprises a feature extraction module 400 and, according to the example shown, a plurality of input terminals 1- 4, and a pre-processing module 300.

As will be further elucidated below, the integrated circuit 100 is such that it can be used, due to its configurability, for different types of applications, in the presence of different types and a different number of sensors, in order to enable the acquisition of signals from the sensors and extract different types of signal features. These features are selectable according to the type of application and user interest. In particular, the integrated circuit 100 is an ASIC (Application Specific Integrated Circuit) type circuit.

In the example in Figure 1, several sensors 200 have been considered, but there may be applications where only one sensor may be used. Furthermore, the signal detection and processing system 1000 may be used for sensors of different types. According to a particular example, the plurality of sensors 200 comprises: an active analogue sensor S1, a passive analogue sensor S2, a biased sensor S3 and a digital sensor S4. The plurality of sensors 200 may comprise only some of the sensor types listed above and may include more than one sensor of each type used, depending on the type of application. Each of the sensors of the plurality 200 generates a corresponding electrical detection signal S ₁ -S ₄ (which may include a measurement of a physical quantity) which may be analogue or digital depending on the type of sensor considered.

The plurality of sensors 200 can be installed to detect (and, in particular, measure) physical quantities of a system to be monitored such as, for example: an apparatus, a device, a machine, an industrial plant or an area of a natural environment. According to other possible examples, sensors 200 are installed to detect biomedical signals or to detect physical quantities in road infrastructure, railway infrastructure, oil and gas pipelines, water pipelines, etc.

With reference to the integrated circuit 100, it should be noted that each of the input terminals 1-4 may be suitable for connection to a different type of sensor. In the example in figure 1, four input terminals 1-4 are shown, but the integrated circuit 100 can be equipped with more input terminals (for example, up to eight or ten inputs). The user can choose which input terminal(s) to use depending on the type and number of sensors to be connected.

Referring to the example in Figure 1, the pre-processing module 300 comprises a plurality of filter F-A and/ or amplification modules connected to, for example, input terminals (1-3) relating to analogue type sensors such as, according to the example, sensors S1-S3.

Each of the filtering and/ or amplification modules F-A may comprise, in particular, a low-pass or band-pass filter (preferably adjustable) and an amplifier, e.g., variable gain amplifier (VGA). Other amplifiers that can be used are: lock-in amplifier, a chopper amplifier, instrumentation amplifier INA (In Amp); preferably, with variable gain. In addition, advantageously, filter and /or amplifier modules F-A can be connected to sensors 200 with single-ended or differential output.

Advantageously, one or more of the filtering and/ or amplification modules F-A may be such as to perform derivation and/ or integration of a corresponding input signal resulting in a derivative or integrated signal from which features may be extracted.

Each filtering and/or amplification module F-A is such as to filter and amplify a respective detection signal to provide a corresponding S _F1 -S _F3 filtered signal.

Advantageously, each filtering and/or amplification module F-A can operate on analogue signals having frequencies ranging from a few Mertz (i.e., from 1.00 to 5.00 Hertz) up to thousands of kHertz (i.e., from 1000.00 to 9000.00 kHertz), so as to be usable for various applications.

Note that the operating parameters of the filter and/or amplification modules F-A are user-configurable (each module independently of the other) and may include: bandwidth, amplification gain. Configurability allows the user setting particular values of the selected parameters within a predetermined range.

In addition, preferably, the integrated circuit 100 is pro vided with an power supply module SS for the polarised sensor S3which may be, for example, a digitally adjustable power supply, or a variable power supply (an alternating voltage).

Each of the filter and/or amplification modules F-A is connected to a respective analogue-to-digital conversion module ADC configured to convert a respective filtered signal S _F1 -S _F3 into a respective digital signal S _D1 -S _D3 . The parameters defining the digitization (e.g. sampling rate, acquisition window, number of samples to be acquired) are also configurable by the user.

Advantageously, each analogue-to~digital converter ADC can operate on analogue signals with frequencies between the above-mentioned values for the amplification and filtering modules, so that it can be used for various possible applications too.

The input terminal 4, which is intended to receive the digital detection signal S4 (coming from the digital sensor S4), is not connected, according to the example, to the filtering and/ or amplification modules F-A nor to the analogue-to-digital converters ADC.

Advantageously, the pre-processing module 300 comprises a digital processing module ELD to which digital signals S _D1 -S _D3 coming out of the converter ADC and the digital detection signal Sr are fed. According to a particular embodiment, the digital processing module ELD comprises a digital filter module DF configured to perform filtering of the input digital signals S _D1 -S _D , S ₄ .

For example, the digital filter module DF can be one of the following filter types: low-pass digital filter (FIR or HR), band-pass, notch filter (band stop filter). These filter types are configurable with their respective digital coefficients. In addition, the digital filter module DF can be such as to perform decimation filtering, when sampling in oversampling technique. According to another example, one or more of the digital filter modules DF may be a high-pass filter or a moving average filter.

According to another form of implementation, one or more of the digital filter modules DF is such that it performs filtering via wavelet, wherein the signal to be filtered is decomposed via Discrete Wavelet Transform and then reconstructed to obtain the filtered version. Advantageously, the digital processing module ELD can also include an nonlinearity correction filter NL configured to correct the effects of nonlinearities that might be introduced by sensors S1-S4 or ADCs.

Preferably, the digital filter DF and/or the nonlinearity correction filter NL are configurable by the user either to set their operating parameters or to enable or disable them for processing depending on the type of application of interest.

According to a particular form of implementation, the digital filter module DF may comprise one or more modules configured to provide a derivative or integrated signal of a corresponding signal at its input. Such a derivative or integrated signal may be used to extrapolate features.

According to a form of implementation sho wn in Figure 1, the pre-processing module 300 includes a multiplexer MUX adapted to perform time-division multiplexing on a single output 5 of the digital signals S _D1 -S _D3 and S ₄ (provided by the analogue-to-digital converters ADC and the digital sensor S4) and, possibly, as resulting from the action of the digital filter DF and/or the non-linearity correction filter NL.

The MUX multiplier may or may not be enabled for operation by the user depending on the type of application considered. The multiplexer MUX may be integrated in the digital processing module ELD and, if used, is such that it returns a multiplexed signal S _M carrying in respective time windows (which depend on the acquisition window of the individual ADCs) the digital values corresponding to each of the digital signals S _D1 -S _D3 and S ₄ .

As an alternative to using the multiplexer MUX, the signals exiting the digital processing module ELD could be stored in a buffer memory (not showm), which is integrated in the integrated circuit 100.

The pre-processing module 300 can be designed specifically for the functionality described above, resulting in an ASIC module.

The feature extraction module 400 comprises: a first extraction module TDF, and at least one of the following modules: a second extraction module FDF and a third extraction module TFDF each adapted to extract (i.e. calculate) at least one signal feature from the digital signals S _D1 -S _D3 and S ₄ (as possibly resulting from the action of the digital filter DF and/or the correction filter NL). The extraction module 400 may receive the digital signals to be processed from the multiplexer MUX or the buffer memory.

More specifically, the first TDF extraction module is configured to extract at least one signal feature in the time domain. For example, the lime domain features that can be extracted using the first extraction module TDF are: mean, variance, root mean square, RMS (Root Mean Square), skewness, crest factor, kurtosis, shape factor, impulse factor, margin factor, median, a given signal percentile (e.g. 25° or 75° percentile), inter-percentile range, mean absolute deviation, peak-to-peak value. It is also possible to store reference values (e.g. threshold values) in order to compare the calculated value of the feature of interest with a reference value and assess any dissimilarity.

The second extraction module FDF is configured to extract at least one feature in the frequency domain. For example, the features in the frequency domain that can be extracted using the second extraction module FDF include at least one spectrum of one of the digital signals S _D1 -S _D3 and S ₄ (which can be calculated using the fast Fourier transform).

From the obtained spectrum, the second extraction module FDF can calculate the following additional signal features: mean, mean frequency variance, skewness, kurtosis, centre of frequency, root variance, rms value (RMS), mean frequency, stabilisation factor, coefficient of variability, skewmess power spectrum, kurtosis power spectrum, root mean square ratio, together with the amplitude of the spectrum tone and the energy levels of the bins. As is known, in the FFT the frequency range from 0Hz to the sampling frequency is divided into N intervals called bins.

In addition, the user can store a pre-calculated frequency spectrum in the second extraction module FDF, so that this second module can extract a similarity measure between each new spectrum and the pre-calculated one. In this way, the end user can eventually recognise a nominal spectrum and then receive an output measure of dissimilarity from that spectrum, which can be understood as a possible indicator of the health of a monitored physical system. Note that the calculated spectrum can be output via a dedicated communication channel or on the same output channel with the other signal features.

The third exfraction module TFDF is adapted to extract at least one feature in the time-frequency domain from at least one of the digital signals acquired from sensors S1-S4. For example, the features in the time-frequency domain that can be extracted by the third extraction module TFDF include the Discrete Wavelet Packet Transform or the Discrete Wavelet Packet Transform, which can be calculated by the same third extraction module TFDF. In addition, the third extraction module TFDF is such that it is possible to select different ways of extending the signal to reach the required length, usually a multiple of 2. The user has the possibility of selecting different Wavelet typologies, such as an example: Haar, Daubechies, Mexican hat, Worlet, Gaussian.

Furthermore, from the Discrete Wavelet Packet Transform, the energy levels associated with the different levels of the transform can be extracted. As is known, the DWT generates new versions of the original signal (suitably filtered), with a new version of the signal for each frequency (of progressively shorter length). In this case, it is possible to provide the user (in addition to the above-mentioned signals transformed via DWT) with the energy levels (calculated, for example, via Root Mean Square) of each of the signals decomposed via Discrete Wavelet Packet Transform. Note that the first extraction module TDF, the second extraction module FDF and the third extraction module TFDF are selectively activable by the user to perform the extraction of the relevant signal features. Furthermore, each extraction module TDF, FDF and TFDF is configurable to define a corresponding group of signal features to be extracted, among all those that could be provided.

Preferably, the features provided by extraction module 400 may also be one or more weighted averages of other extracted features. The user may set the weights of such averages from, for example, a Principal Component Analysis.

The extraction module 400 is hardwired, i.e., it is a processing unit that uses combinational logic, or chains of combinational and sequential logic, with a finite number of gates and such that it generates specific results based on the instructions used to retrieve those results.

In particular, the hardwired extraction module 400 implements well-defined logical functions and/or algebraic functions and/or transcendent functions that cannot be modified, except in the coefficients/ parameters of the implemented functions. In accordance with the examples provided, the extraction module 400 can be implemented to include all the combinatorial and sequential logic required to calculate all the different types of features listed above.

In addition, the integrated circuit 100 includes a control module CNT of the circuit itself and adapted to allow- the user to configure the modules of the integrated circuit 100 to select the processing parameters and signal features to be extracted. The control module CNT may be of one of the following types: a CPU (Control and Processor Unit); a Finite State Machine, Complex Programmable Logic (CPL); or a combination of the three previous types.

A memory MEM, preferably of the SRAM (Static Random Access Memory) type, is included in the integrated circuit 100. In addition, the integrated circuit 100 includes a clock and power management module PMC.

According to a particular form of implementation, the integrated circuit 100 includes a debug interface module DEB to be used in the event of a malfunction to perform a suitable test. The debug module DEB adapted to the SPI (Serial Peripheral Interface) protocol and / or the JTAG (Joint Test Action Group) protocol.

Advantageously, a communication module COMM is also provided that is adapted for communication outwards from integrated circuit 100 and can operate according to protocols that may be those required by the specific application, such as, for example: either wireless protocols (LoRa, WiFi, Bluetooth etc.) or wireline protocols (modbus, EtherCAT, Ethernet, S7, profibus, usb, IOlink, CAN, SPI and I2C etc.). Alternatively, specially designed data transmission methods could be used.

The communication module COMM can transmit the calculated signal features to the outside of integrated circuit 100 and can receive instructions from the outside regarding the configuration of integrated circuit 100.

According to a particularly advantageous form of realisation, it is possible to set up different modes of acquisition of a detection signal from one of the sensors S ₁ -S ₄ .

According to an example, it is possible for the user to set a recording frequency of a time portion of a detection signal S ₁ -S ₄ , so as to set an acquisition rate of one of the detection signals (analogue or digital) and feature extraction. According to this mode, the user installing the integrated circuit 100 can set it to perform a sampling and processing task at predefined intervals. According to another example, a trigger signal (generated outside the integrated circuit 100) can be used to command the start of an acquisition. In this way, an acquisition and extraction activity is performed only at specific times and for a predefined amount of time. An example of the use of such a capability may be the initiation of an industrial task, in which the user is interested in acquiring a signal only when an industrial apparatus performs a specific operation, the initiation of which may be identified by using a digital signal from an industrial controller.

Furthermore, it is possible to use a trigger signal to start the acquisition procedure, coupled with another trigger signal such that the acquisition procedure is interr upted.

Among other possible applications, integrated circuit 100 can be used for data acquisition and manipulation for Condition-Based Maintenance in industrial plants. Industrial plants often require the extraction of statistical indicators from raw electrical current or mechanical vibration signals.

It should also be noted that integrated circuit 100 can be used for Condition Monitoring, and thanks to the possibility of transmitting the extrapolated features to the outside world, it can be used in the area of Fog Computing (thus creating a dedicated Fog layer for physical systems) or Edge Computing.

From the point of view of integration technology, integrated circuit 100 can be realised using a scaled CMOS technology (which presents higher volumes at lower unit costs), but also in BiCMOS, BCD, SOI, FinFet, InGaAs or other technologies.

Figure 2 refers to another form of implementation and shows a further integrated circuit 500, more specifically a System On a Chip, which provides the same functionality as described with reference to figure 1, but which can also provide optional additional functions.

The form of implementation in Figure 2 refers to the possibility of employing the extraction module 400 as an accelerator hardware within an integrated circuit that may also provide other functionalities, separate from that related to feature calculation. For example, the integrated circuit 500 is an ordinary microcontroller, within which the extraction module 400 is inserted to accelerate the feature extraction calculations.

According to this example, all or part of the functionality described with reference to the digital processing m odule ELD is performed by a General Purpose Programmable Unit 600 (GPPU), while the extraction module 400 (hardwired) is performed in a similar manner as described above with reference to Figure 1. The functions described with reference to the filtering and/ or amplification modules F-A of figure 1 can be performed, in the circuit of figure 2, by the analogue-to- digital conversion block ADC or these can be implemented by blocks/ modules external to the integrated circuit 500. The analogue-to-digital conversion block ADC could also be external to the integrated circuit 500.

According to one particular example, the further integrated circuit 500 comprises one or more additional modules to those of Figure 1, such as: a digital signal processing module DSP, a cache memory CM, a digital-to-analogue conversion module DAC, and an flash memory EM. These additional modules can also be used for other functionalities besides those related to feature extraction. The above-mentioned add-on modules, the programmable unit 600 and the other modules also described with regard to figure I (including the extraction module 400) are connected to each other by a system bus 501 (BS) for the exchange of signals and data.

Figure 2 also shows an input port I ^D for digital signals and one or more input terminals I _A for analogue signals, which can be connected to related sensors 200. In addition, the integrated circuit 500 includes an analogue output port O _A , a digital output port O _D and a connection port O _N to connect to an external network.

Integrated circuit 100 overcomes the problems highlighted for known technologies based on general purpose hardware.

Integrated Circuit 100 does not present the problem of requiring complex programming for the calculation of signal features, as the processing and extraction modules integrated in it are already implemented in such a way that various types of processing and extraction of features can be performed, and the user can only select the operations of interest by defining the relevant operating parameters and the features he or she wishes to obtain.

Furthermore, as already mentioned, the solution described here makes it possible to simplify the development of a Fog or Edge Computing architecture to perform Condition Monitoring, as well as the electronic instrumentation on board a vehicle, such as a railway vehicle or a car.

More generally, the solution described here is particularly advantageous for those applications in which it is necessary to pre-process a physical signal upstream of subsequent analyses. The advantages of this solution make data pre- processing more accessible for various sectors, both from a technical-engineering point of view (less space required, less energy consumption, higher processing speed) and from an economic point of view (lower cost, no programming required). DRAWING NUMBER LEGEND

- signal processing integrated circuit 100

- sensors 200

~ pre-processing module 300

- feature extraction module 400

- signal detection and processing system 1000

- input terminals 1-4

- active analogue sensor S1

- passive analogue sensor S2

- biased sensor S3

- digital sensor S4

- electrical detection signals S ₁ -S ₄

- filtering and/or amplification module F-A

- filtered signals S _F1 -S _F3

- analogue-to-digital conversion module ADC

- digital signals S _D1 -S _D3

- digital processing module ELD

- digital filter module DF

- non-lmearitv correction filter N L

- multiplexer MUX

- multiplexed signal S _M

- first extraction module TDF

- second extraction module FDF

- third extraction module TFDF

- memorv MEM - communication module COMM

- debug interface module DEB

- clock and power management module PMC

- control module CNT - additional integrated circuit 500

- general purpose programmable unit 600

- digital signal processing module DSP

- cache memory CM

- digital-to-analogue conversion module DAC - flash memory FM

- system bus 501 (BS)

- input port I _D

- input terminal I _A

- analogue output port O _A - digital output port O _D

- connection port O _N