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Title:
SKEW-CORRECTING APPARATUS USING ITERATIVE APPROACH
Document Type and Number:
WIPO Patent Application WO/2008/014600
Kind Code:
A1
Abstract:
This algorithm and apparatus provides the ability to deskew a plurality of lanes comprising a data bus in a high-speed data communications system. This deskewing is necessary due to inherent system skew. By iterating through the possible intervals within the maximum expected skew search space, the correct combination of search space intervals for all lanes can be determined to provide alignment and thus compliancy with relevant standards, such as the SxI-5 standard, in terms of data skew specifications.

Inventors:
HAAS WALLY (CA)
PITTMAN MUTEMA JOHN (CA)
RUMBOLT CHUCK (CA)
Application Number:
PCT/CA2007/001309
Publication Date:
February 07, 2008
Filing Date:
July 25, 2007
Export Citation:
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Assignee:
AVALON MICROELECTRONICS INC (CA)
HAAS WALLY (CA)
PITTMAN MUTEMA JOHN (CA)
RUMBOLT CHUCK (CA)
International Classes:
H04L1/00; H04L1/12; H04L1/20; H04L7/00
Foreign References:
US6201831B12001-03-13
US20040136411A12004-07-15
US20030142772A12003-07-31
Attorney, Agent or Firm:
MBM & CO. (Station BOttawa, Ontario K1P 5P9, CA)
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Claims:

Claims:

[Claim 1 ] An algorithm and apparatus for compensating for the amount of skew in each transmitting lane, relative to a reference lane, of a parallel data transmission system comprising:

(a) a plurality of lane pairs with a transceiver (i.e. transmitter and receiver pair) for each; and

(b) feedback or status signal(s) from the receiving parallel data transmission.

[Claim 2] A skew compensating apparatus according to claim 1 , where the feedback or status signal(s) may be associated with each single lane pair, groups of lane pairs, or an aggregate signal for the entirety of lane pairs.

[Claim 3] A skew compensating apparatus according to claim 1 , where the feedback or status signal(s) report the successful, error-free reception of the data stream.

[Claim 4] A skew correction apparatus for the purposes of adding skew to each transmitting lane, in order to align the lanes relative to a reference lane, comprising:

(a) a plurality of lane pairs with a transceiver (i.e. transmitter and receiver pair) for each;

(b) a buffer to delay each lane by a specified amount of time; and

(c) a pointer to the buffer with details on the amount of skew to inject into each lane.

[Claim 5] A skew correction apparatus according to claim 4, where the buffer used for lane delay may be implemented using a FIFO (first in, first out) buffer.

Description:

Skew-Correcting Apparatus using Iterative Approach

BACKGROUND OF THE INVENTION

1 . Field of the Invention

The present invention relates to chip-to-chip high speed data communications and the correction of skew in each transmit channel, within relevant specified standards.

2. Description of Related Art

Parallel transmission, as defined with respect to the present invention, is the serial transmission of data over a plurality of lines on a data bus. In this parallel data transmission, skew can be added to each serial data lane through such means as serialization, cross-clock domain crossing, or through static skew parameters such as trace length. This skew can result in different alignments between lines of the data bus. Thus, there is a need to correct this skew, or to deskew the data lines. If the amount of skew added on each line can be found, then a skew injecting apparatus that can compensate for the skew added on each line can eliminate the problem, and thus adhere to relevant standards which specify skew requirements.

The following system description is applicable to any chip-to-chip high speed communications system where skew compensation may be of benefit. Specific standards mentioned throughout, such as SFI-5 and Sxl-5, should be considered examples and are in no way exhaustive.

One of the standards describing the objectives and requirements of a multi-bit bus, for use in the interconnection between devices in communications systems with up to 50Gb/s optical links, is published by the Optical Internetworking Forum: Serdes Framer Interface Level 5 (SFI-5): Implementation Agreement for 40Gb/s Interface for Physical Devices, with Serdes referring to Serialization and Deserialization (Dartnell, Lerer & Lynch, 2002). The electrical I/O characteristics of this interface are defined in the standard System Interface Level 5 (Sxl-5): Common Electrical Characteristics for 2.488 - 3.1 25Gbps Parallel Interfaces (Palkert & Lerer, 2002).

The SFI-5 bus has a 16-bit wide data bus with each channel operating at up to 3.125Gb/s with a Deskew, or Parity, Channel. The Serdes component of the communications system thus requires 1 7 transceivers to handle these 1 7 lanes. Each one of these transceivers may have different skew characteristics and therefore, may cause misalignment to the standard when transmitting data. BRIEF SUMMARY OF THE INVENTION

To compensate for the skew differences between each individual lane on the transmit side, an algorithm can be implemented to inject skew into each individual lane to re-align the data. Since the amount of skew that should be injected into each lane for compensation purposes is not known, the algorithm will need to be responsible for iterating through different combinations of skew

injections for each individual lane until the correct combination has been determined.

This is different from the current systems on the market that involve grouping bus lines with each group having its own clock domain (United States Patent #06839862, Evoy, Pontius & Ehmann, 2005) or by using multiple synchronization codes (United States Patent #06920576, Ehmann, 2005): as Evoy et al. describe, "by grouping the bus lines in groups with each group having its own clock domain, skew across clock-domain groups is tolerated and overcome by processing the data and the skew first within each clock domain group, and then between groups;" while Ehmann's solution "overcomes skewing problems by transferring digital data with automatic realignment," i.e., using synchronization codes.

The proposed system of the present invention uses neither separate clock domains for bus line groups, nor adds synchronization codes, but rather employs an algorithm to systematically iterate through different combinations of individual lane skew settings until the correct combination is achieved, thus eliminating any skew related problems and meeting all relevant standards. BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

FIG. 1 is a block diagram of how the deskew algorithm may be implemented when using out-of-alignment signals for each individual lane.

FIG. 2 is a block diagram of how the deskew algorithm may be implemented when using an aggregated out-of-alignment signal providing the status for all lanes.

FIG. 3 is a block diagram of how the skew injection technique may be implemented. DETAILED DESCRIPTION OF THE INVENTION

On the transmit side, skew can be injected on a per-lane basis to compensate for any skew added by the system, such as Field Programmable Gate Array (FPGA) startup conditions. This injected skew achieves compliancy as specified by applicable standards, such as Sxl-5. To determine how much skew should be injected to meet these standards, the following algorithm is implemented.

The present invention consists of N+ J transceivers for the purposes of data transmission and reception. The system is designed such that a deskewing algorithm can be used to determine the necessary per-lane skew to be added for total lane alignment.

The term "deskewing algorithm," as used herein, refers to a calibration method to achieve total lane alignment with respect to a desired lane-to-lane skew goal, usually defined by standards such as Sxl-5. These standards often specify skew related characteristics in terms of the Unit Interval of Time, or Ul. Ul is calculated via 1 /(data bit rate). The method uses an iterative process to determine the correct combination of skew injection parameters for each transmitting lane.

In order to determine this suitable combination, skew is systematically injected into each lane. On the receive side, a feedback

signal is necessary to give status updates as to alignment of the lane. This feedback signal may be specific to the particular lane or can be an aggregation of some, or all, of the lanes. When alignment is successful, the feedback signal will indicate this success, thus indicating that the correct amount of skew has been injected and proper deskewing has occurred.

If the feedback signal is particular to a single lane, then the process of injecting skew will have to be performed for each lane. For an aggregated feedback signal, the process of injecting skew will occur on all lanes, as only one combination will satisfy the aggregated status. This process will take much longer as the search space of combinations will be much larger.

The system of the present invention enables the deskewing of lanes through the use of a deskewing algorithm. The following examples will illustrate the workings of possible systems in more detail. These examples will deal with smaller 3 transceiver systems; however, the 3 transceiver example is easily expandable into an SFI-5 system with 1 7 transceivers, or any other transceiver-based system. Transceivers are herein also referred to as MGTs (Multi- Gigabit Transceivers).

The following examples are set forth to gain a better understanding of the algorithm portion of the invention described herein. These examples are provided for illustrative purposes only and should not limit the scope of this invention in any way.

EXAMPLE 1 : Per-lane Feedback Signal The system in this case has a feedback signal for each individual lane that reports on the successful, error-free reception of the data stream on that particular lane. Error-free reception is expected when an appropriate amount of skew has been injected on the individual lane relative to a reference lane. When one lane's feedback signal reports the correct alignment, the process begins with the next lane, until all lanes have been aligned and thus deskewed. This system is shown in FIG. 1 .

In Example 1 , there is a plurality of feedback signals - one for each lane as illustrated in FIG. 1 . The variables and constants used in this example are defined as:

Definition List 1

The 3 MCT system has an out-of-alignment alarm for each lane, labeled OOA_0, OOA_1 and OOA_2. Each alarm will report an error should one occur on its respective lane. These alarms are expected to remain set, if the correct alignment has not occurred, and are expected to clear within a specified time (t) if correct alignment has been achieved.

The search space (S) refers to the maximum Ul that a lane may be expected to be out of alignment. With reference to the applicable standard, there is typically a specification as to the maximum allowable skew tolerance in order to achieve compliancy with said standard. For the Sxl-5 standard, that maximum allowable skew tolerance between lanes is set at 5 Ul. The search space interval (i) must be set at a value less than this skew tolerance. To achieve the fastest possible search times, it is best to set the search space interval at 1 Ul below the skew tolerance level specified in the applicable standard. Thus, with reference to the Sxl-5 standard, the search space interval (i) should be set to 4.

For the purposes of this example, the search space (S) will be set at 20 Ul, which is an arbitrary choice, with the search space interval (i) set to 4 Ul. This gives five possible sets of interval choices for each lane, i.e., from 0-4, 4-8, 8-12, 12-16 and 16-20.

The process begins with Lane 0 set in the first interval position. If the out-of-alignment alarm, OOA_0, indicates an alarm

condition after a specified wait-time (t), then the lane realigns to the next interval position. Again, the OOA_0 alarm is checked and if the alarm condition is still active the next interval position is tested. This process continues until the OOA_0 alarm indicates alignment for a specific interval position or the entire search space has been exhausted. For this reason, it is important to choose the search space such that it is large enough to take in the maximum expected lane skew deviation.

Assuming the OOA_0 alarm indicates that Lane 0 has achieved alignment, the process begins for the next lane, Lane 1 . When the alarm for Lane 1 , OOA_1 , indicates successful alignment, the process continues for Lane 3. When the alarms for each lane have achieved alignment, the process ends.

The maximum amount of search intervals for this example that have to be traversed through is 1 5, i.e., five intervals for each of the three lanes. In order to determine the maximum amount of search intervals for a different system, the following variables need to be known: o n+1 , the total number of lanes o S, the search space size o i, the search space interval

Therefore, the maximum amount of search intervals (C) can be determined through the following formula: o C = (n+l )*S/i

In order to determine an approximate maximum time for the searching process, the maximum amount of search intervals must be multiplied by the time (t) necessary to wait for an OOA alarm check. Thus the maximum wait time (T) is given by: o T = t*(n+ l )*S/i

By following this process, all lanes can be deskewed sequentially to provide total lane alignment in compliancy with relevant standards, such as Sxl-5.

EXAMPLE 2: Aggregated Feedback Signal

The system in this case has a feedback signal that reports the aggregated status across all lanes, i.e., there is only one feedback signal for the entire system. Thus only when every lane has been deskewed will the feedback signal report success. This system is shown in FIG. 2.

In Example 2, there is one aggregated feedback signal, i.e., the combination of all feedback signals as illustrated in FIG. 2. If there is an out-of-alignment error for either lane, the aggregated signal will report an error. The variables and constants used in this example are defined as:

Definition List 2

The 3 MCT system has an aggregated out-of-alignment alarm combining the status for each lane, labeled OOA. The alarm will report an error should one occur on any lane.

The search space (S) refers to the maximum Ul that a lane may be expected to be out of alignment. With reference to the applicable standard, there is typically a specification as to the maximum allowable skew tolerance in order to achieve compliancy with said standard. For the Sxl-5 standard, that maximum allowable skew tolerance between lanes is set at 5 Ul. The search space interval (i) must be set at a value less than this skew tolerance. To achieve the fastest possible search times, it is best to set the search space interval at 1 Ul below the skew tolerance level specified in the applicable standard. Thus, with reference to the Sxl-5 standard, the search space interval (i) should be set to 4.

For the purposes of this example, the search space (S) will be set at 20 Ul, which is an arbitrary choice, with the search space interval (i) set to 4 Ul. This gives five possible sets of interval choices for each lane, i.e. from 0-4, 4-8, 8-12, 12-16 and 16-20.

The process begins with all lanes set in the first interval position. If the out-of-alignment alarm, OOA, indicates an alarm condition after a specified wait-time, then the first lane realigns to the next interval position. Again, the OOA alarm is checked and if the alarm condition is still active the next interval position for the first lane is tested. This process continues for all five interval positions. If the OOA alarm still indicates an alarm condition then the next lane can be iterated through, while still iterating through the first lane. This process can be lengthy as there is only one global alarm making the range of combinations much larger. The process ends when the OOA alarm indicates alignment for a specific interval position on each lane or the entire search space has been exhausted. For this reason, it is important to choose the search space such that it is large enough to take in the maximum expected lane skew deviation.

The maximum amount of search intervals for this example that have to be traversed through is 125, i.e. five intervals for each of the three lanes. In order to determine the maximum amount of search intervals for a different system, the following variables need to be known: o n+1 , the total number of lanes o S, the search space size o i, the search space interval

Therefore, the maximum amount of search intervals (C) can be determined through the following formula: o C = (S/i) (n+1 >

In order to determine an approximate maximum time for the searching process, the maximum amount of search intervals must be multiplied by the time (t) necessary to wait for an OOA alarm check. Thus the maximum wait time (T) is given by: o T = t*(S/i) (n+1 >

By following this process, all lanes can be deskewed to provide total lane alignment in compliancy with relevant standards, such as Sxl-5.

The previously explained deskewing methods are only considered as examples. Different configurations of each are possible as long as deskewing is achieved. Combined configurations, such as multiple aggregated signals for groups of lanes, are also possible as long as deskewing is achieved.

In order to inject the appropriate amount of skew into each lane to traverse the different search space intervals, the unaligned transmit (TX) data lines enter a buffer for the purposes of lane deskewing. The skew values to be injected for each lane are supplied to the buffer. The buffer then bit shifts each lane the appropriate amount to move to a different alignment position as specified by the search space intervals. A representation of a possible embodiment of this injection system is shown in FIG. 3. The output from the buffer is the re-aligned TX data lines, which can then be tested for compliancy against the skew specifications for relevant standards, as per the description of the algorithm.

REFERENCES CITED

U.S. Patent Documents o 65571 1 0 Apr., 2003 Sakamoto et al. 71 3/503 o 6690757 Feb., 2004 Bunton et al. 375/371 o 6820234 Nov., 2004 Deas et al. 714/814 o 6839862 Jan., 2005 Evoy et al. 71 3/503 o 6907552 Jun., 2005 Collins 714/700 o 6920576 July, 2005 Ehmann 71 3/400 o 6996738 Feb., 2006 Chiang 71 3/503

Other References o OIF, System Framer Interface Level 5 (SFI-5), 29 Jan. 2002 o OIF, System Interface Level 5 (Sxl-5), Oct. 2002