A SLOT VIA FILLED DUAL DAMASCENE STRUCTURE WITHOUT MIDDLE STOP LAYER AND METHOD FOR MAKING THE SAME

WIPO Patent Application WO2002063676

A3

An interconnect structure and method of forming the same in which a diffusion barrier/etch stop layer (22) is deposited over a conductive layer (20). An organic low k dielectric material (24) is deposited over the diffusion barrier/etch stop layer (22) to form a first dielectric layer (24). The first dielectric layer (24) is etched to form a slot via (50) in the first dielectric layer (24). An inorganic low k dielectric material (30) is deposited within the slot via (50) and over the first dielectric layer (24) to form a second dielectric layer (30) over the slot via (50) and the first dielectric layer (24). The re-filled via (50) is simultaneously etched with the second dielectric layer (30) in which a trench (38) is formed. The trench (38) extends in a direction that is normal to the length of the slot via (50). The entire width of the trench (38) is directly over the via (36). The re-opened via and the trench (38) are filled with a conductive material (40). In other embodiment, the first dielectric layer (24) comprises an inorganic low k dielectric layer and the second dielectric layer (30) comprises an inorganic low k dielectric layer.

WANG FEI
OKADA LYNNE A
SUBRAMANIAN RAMKUMAR
GABRIEL CALVIN T

PCT/US2001/048149

March 13, 2003

December 12, 2001

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ADVANCED MICRO DEVICES INC (US)

H01L21/768; H01L23/522; H01L23/532; (IPC1-7): H01L21/768

WO2000075988A1

2000-12-14

PATENT ABSTRACTS OF JAPAN vol. 2000, no. 13 5 February 2001 (2001-02-05)
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 10 31 October 1997 (1997-10-31)
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 02 29 February 2000 (2000-02-29)

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