Title:
SOC BASEBAND CHIP, AND MISMATCH CALIBRATION CIRCUIT FOR CURRENT-STEERING DIGITAL-TO-ANALOG CONVERTER OF SAME
Document Type and Number:
WIPO Patent Application WO/2019/080911
Kind Code:
A1
Abstract:
Disclosed are a mismatch calibration circuit for a current-steering digital-to-analog converter of an SoC baseband chip, and an SoC baseband chip, wherein the mismatch calibration circuit comprises current mirror compensation circuits (100), a calibration handover switch module (200), a calibration resistor (R ref), a voltage detection module (300) and a calibration control module (400). The resistance value of the calibration resistor (R ref) is 2 N-1 times the resistance value of a load resistor (R L) in the current-steering digital-to-analog converter, with N being the number of MSB significant bits; and the number of current mirror compensation circuits (100) is equal to the number of MSB current mirror branches in the current-steering digital-to-analog converter, and the two are connected in parallel to constitute current mirror parallel branches. The circuit solves the problem of mismatch error in the output current of a DAC current mirror array in an SoC baseband chip of 28 nm or smaller process size, and improves the conversion accuracy of a DAC.
Inventors:
GUO XIAOFENG (CN)
DUSTER JON SWEAT (US)
FENG HAIGANG (CN)
ZHANG NING (CN)
TAN YULIN (CN)
DUSTER JON SWEAT (US)
FENG HAIGANG (CN)
ZHANG NING (CN)
TAN YULIN (CN)
Application Number:
PCT/CN2018/111967
Publication Date:
May 02, 2019
Filing Date:
October 25, 2018
Export Citation:
Assignee:
RADIAWAVE TECH CO LTD (CN)
International Classes:
H03M1/10
Foreign References:
| CN107819465A | 2018-03-20 | |||
| CN104617953A | 2015-05-13 | |||
| CN103840832A | 2014-06-04 | |||
| CN105204563A | 2015-12-30 | |||
| US20090201186A1 | 2009-08-13 | |||
| US20020186156A1 | 2002-12-12 |
Attorney, Agent or Firm:
CENFO INTELLECTUAL PROPERTY AGENCY (CN)
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