Title:
SOLID ELECTROLYTIC CAPACITOR AND CAPACITOR ARRAY
Document Type and Number:
WIPO Patent Application WO/2024/009824
Kind Code:
A1
Abstract:
A solid electrolytic capacitor 1 comprises an anode plate 10 which includes a porous layer 12 on at least one of main surfaces, a dielectric layer 20 which is provided on a surface of the porous layer 12, a solid electrolyte layer 31 which is provided on a surface of the dielectric layer 20, a conductor layer 32 which is provided on a surface of the solid electrolyte layer 31, and an insulating layer 40 which is provided on a surface of the dielectric layer 20 and is characterized in that the insulating layer 40 is provided so as to cover at least a part of an end portion of the solid electrolyte layer 31 in a region surrounding the solid electrolyte layer 31.
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Inventors:
TOKUDA KATSUHIKO (JP)
FURUKAWA TAKESHI (JP)
FURUKAWA TAKESHI (JP)
Application Number:
PCT/JP2023/023597
Publication Date:
January 11, 2024
Filing Date:
June 26, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G9/048; H01G4/38; H01G9/012; H01G9/08
Domestic Patent References:
WO2021039053A1 | 2021-03-04 |
Foreign References:
JP2004146643A | 2004-05-20 | |||
JP2007251101A | 2007-09-27 |
Attorney, Agent or Firm:
WISEPLUS IP FIRM (JP)
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