Title:
SOLID-STATE IMAGE CAPTURING ELEMENT AND IMAGE CAPTURING DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/183808
Kind Code:
A1
Abstract:
A solid-state image capturing element is provided with a comparator which compares a reference signal with a pixel signal, wherein the image quality of image data is enhanced. According to the present invention, a voltage dividing circuit supplies divided voltages of a received input voltage and a prescribed reference voltage. An input-side differential transistor outputs a drain current according to a gate-source voltage between a divided voltage input to a gate and a prescribed source voltage. An output-side differential transistor outputs a voltage according to the drain current as a comparison result between the input voltage and the reference voltage. A control transistor lowers the gate-source voltage when the input voltage has a value outside a prescribed range.
Inventors:
AKEBONO SACHIO (JP)
UENO YOSUKE (JP)
UENO YOSUKE (JP)
Application Number:
PCT/JP2019/046089
Publication Date:
September 17, 2020
Filing Date:
November 26, 2019
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H03M1/56; H03F3/34; H03K5/08; H04N5/369; H04N5/378
Domestic Patent References:
| WO2019026564A1 | 2019-02-07 |
Foreign References:
| JP2018148541A | 2018-09-20 | |||
| US20170054931A1 | 2017-02-23 | |||
| US20110249162A1 | 2011-10-13 |
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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