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Title:
SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/181653
Kind Code:
A1
Abstract:
[Problem] To provide a solid-state imaging device that efficiently uses three-dimensional transistors. [Solution] This solid-state imaging device comprises: pixel circuits; a pixel array; a first signal line; and a first signal processing circuit. The pixel circuits output signals based on the intensity of light received by light-reception elements. In the pixel array, the pixel circuits are arranged in a two-dimensional array in a first direction and a second direction that intersects with the first direction. The first signal line is connected to the pixel circuits that are successively arrayed in the second direction. The first signal processing circuit performs signal processing on signals from the pixel circuits outputted from a plurality of the signal lines. At least one transistor in the pixel circuits and at least one transistor in the first signal processing circuit are three-dimensional transistors.

Inventors:
HARATA HIDEHIRO (JP)
HANZAWA KATSUHIKO (JP)
KATO AKIHIKO (JP)
Application Number:
PCT/JP2023/003375
Publication Date:
September 28, 2023
Filing Date:
February 02, 2023
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H01L21/8234; H01L27/06; H01L27/088; H04N25/70
Domestic Patent References:
WO2021033454A12021-02-25
Foreign References:
JP2022036893A2022-03-08
JP2015159501A2015-09-03
JP2009290628A2009-12-10
JP2010199161A2010-09-09
JP2021145173A2021-09-24
Attorney, Agent or Firm:
MIYAJIMA Manabu (JP)
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