Title:
SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/181099
Kind Code:
A1
Abstract:
The present invention improves image quality in a solid-state imaging element in which all pixels are to be simultaneously exposed. This solid-state imaging element comprises a first pixel and a second pixel. In the first pixel, a first selective transistor that opens and closes a path between a prescribed node and a first capacitive element which holds a prescribed reset level is disposed at a specific relative position, and a second selective transistor that opens and closes a path between a node and a second capacitive element which holds a signal level according to an exposure amount is disposed at a relative position different from the specific relative position. In the second pixel, a third selective transistor that opens and closes a path between a prescribed node and a third capacitive element which holds a prescribed reset level is disposed at a specific relative position, and a fourth selective transistor that opens and closes a path between a node and a fourth capacitive element which holds a signal level according to an exposure amount is disposed at a relative position different from the specific relative position.
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Inventors:
ASAKURA LUONGHUNG (JP)
Application Number:
PCT/JP2022/000861
Publication Date:
September 01, 2022
Filing Date:
January 13, 2022
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H04N5/359; H01L27/146; H04N5/363; H04N5/3745
Foreign References:
| JP2019057873A | 2019-04-11 | |||
| JP2020057949A | 2020-04-09 | |||
| JP2011078104A | 2011-04-14 |
Other References:
KAZUAKI NAKAMURA: "141st Keywords you should know: Model Inversion Attack", THE JOURNAL OF THE INSTITUTE OF IMAGE INFORMATION AND TELEVISION ENGINEERS, EIZO JOHO MEDIA GAKKA, JP, vol. 75, no. 3, 1 May 2021 (2021-05-01), JP , pages 384 - 386, XP009548882, ISSN: 1342-6907
JAE-KYU LEE ET AL.: "A 2.1e-Temporal Noise and -105dB Parasitic Light Sensitivity Backside-Illuminated 2.3 pm-Pixel Voltage-Domain Global Shutter CMOS Image Sensor Using High-Capacity DRAM Capacitor Technology", ISSCC 2020
JAE-KYU LEE ET AL.: "A 2.1e-Temporal Noise and -105dB Parasitic Light Sensitivity Backside-Illuminated 2.3 pm-Pixel Voltage-Domain Global Shutter CMOS Image Sensor Using High-Capacity DRAM Capacitor Technology", ISSCC 2020
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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