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Title:
SOLID-STATE IMAGING ELEMENT, ELECTRONIC APPARATUS, AND METHOD FOR MANUFACTURING SOLID-STATE IMAGING ELEMENT
Document Type and Number:
WIPO Patent Application WO/2020/158515
Kind Code:
A1
Abstract:
This solid-state imaging element (1) comprises one or more photoelectric conversion layers (2), a via (50), and a connecting pad (52). The one or more photoelectric conversion layers (2) are provided on the side of one major surface of a semiconductor substrate (10) that is a light incident surface. The via (50) is provided in a pixel area, and has one end connected to the photoelectric conversion layers (2). The via (50) penetrates through the semiconductor substrate (10) from top to bottom, and transfers charges obtained by photoelectric conversion performed by the photoelectric conversion layers (2) to the other major surface side of the semiconductor substrate (10). The connecting pad (52) is provided in the same layer as that of the gate (Ga, Gr, G1, g2) of a transistor (AMP, RST, TG1, TG2) provided on the other major surface side of the semiconductor substrate (10), and has the other end of the via (50) connected thereto.

Inventors:
SHIGETOSHI TAKUSHI (JP)
TOGASHI HIDEAKI (JP)
YAMAMOTO JUNPEI (JP)
FUKUOKA SHINPEI (JP)
TAKEO MOE (JP)
NISHIDA SHO (JP)
Application Number:
PCT/JP2020/001960
Publication Date:
August 06, 2020
Filing Date:
January 21, 2020
Export Citation:
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Assignee:
SONY CORP (JP)
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H01L21/3205; H01L21/768; H01L23/522; H04N5/369; H04N5/374
Domestic Patent References:
WO2012147302A12012-11-01
Foreign References:
JP2017073436A2017-04-13
JP2017054939A2017-03-16
JP2017073436A2017-04-13
Other References:
See also references of EP 3920224A4
Attorney, Agent or Firm:
SAKAI INTERNATIONAL PATENT OFFICE (JP)
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