Title:
SOLID-STATE IMAGING ELEMENT, METHOD FOR PRODUCING SOLID-STATE IMAGING ELEMENT, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/249575
Kind Code:
A1
Abstract:
A solid-state imaging element (1) according to the present disclosure is provided with a semiconductor layer (20) and an isolation region (23). The semiconductor layer (20) comprises a plurality of photoelectric conversion parts which are arranged in a matrix form. The isolation region (23) isolates photoelectric conversion parts, which are adjacent to each other in the semiconductor layer (20), from each other. In addition, the isolation region (23) comprises a wall-like electrode (24) and a low absorption member (26). The wall-like electrode (24) is arranged in the form of a wall; and a negative bias voltage is applied thereto. The low absorption member (26) is arranged closer to the light incident side than the wall-like electrode (24), while having a lower optical absorptance than the wall-like electrode (24).
Inventors:
OOKI SUSUMU (JP)
HIRAMATSU KATSUNORI (JP)
HIRAMATSU KATSUNORI (JP)
Application Number:
PCT/JP2022/005561
Publication Date:
December 01, 2022
Filing Date:
February 14, 2022
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H01L21/3205; H01L21/768; H01L23/522; H04N5/374
Domestic Patent References:
| WO2020262131A1 | 2020-12-30 | |||
| WO2019220945A1 | 2019-11-21 |
Foreign References:
| US20170373108A1 | 2017-12-28 | |||
| US20190296060A1 | 2019-09-26 | |||
| JP2009088030A | 2009-04-23 |
Attorney, Agent or Firm:
SAKAI INTERNATIONAL PATENT OFFICE (JP)
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