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Title:
SOT-MRAM MEMORY CELL AND PREPARATION METHOD THEREFOR, AND SOT-MRAM
Document Type and Number:
WIPO Patent Application WO/2023/124497
Kind Code:
A1
Abstract:
The present invention provides a SOT-MRAM memory cell and a preparation method therefor, and a SOT-MRAM. In a SOT-MRAM memory cell, by means of adding an insulation layer between a SOT track layer and a free layer of a magnetic tunnel junction and providing a plug capable of transmitting a spin current penetrating through the insulation layer, the plug being connected between the free layer and the SOT track layer, spin current generated by the SOT track layer is transmitted to the free layer. During preparation of a SOT-MRAM component, a process window for etching of the magnetic tunnel junction can be provided by means of adding the insulation layer and the plug, thereby greatly increasing a window for an etching process. When excess etching is performed so as to remove a metal material that has been re-deposited after reverse sputtering, not only can a short circuit phenomenon of the SOT track layer or the magnetic tunnel junction be eliminated, but also the phenomenon of the SOT track layer being etched, damaged, or penetrated can be completely eliminated, improving device yield. The added insulation layer can also increase the distance between the free layer in the magnetic tunnel junction and the SOT track layer, and decrease the effect of thermal diffusion from the SOT track layer on the free layer when energized, thereby reducing the temperature of the free layer.

Inventors:
LIU EN LONG (CN)
HE SHI KUN (CN)
Application Number:
PCT/CN2022/128576
Publication Date:
July 06, 2023
Filing Date:
October 31, 2022
Export Citation:
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Assignee:
ZHEJIANG HIKSTOR TECH CO LTD (CN)
International Classes:
H01L27/24; H01L43/08; H01L43/12
Foreign References:
CN113690366A2021-11-23
CN111180577A2020-05-19
CN113690367A2021-11-23
CN113169269A2021-07-23
CN112002722A2020-11-27
Attorney, Agent or Firm:
BEIJING LTXT INTELLECTUAL PROPERTY LAW LLC (CN)
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