Title:
STORAGE AND CALCULATION INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2021/248643
Kind Code:
A1
Abstract:
A storage and calculation integrated circuit, comprising a resistive random access memory array and a peripheral circuit. The resistive random access memory array comprises a plurality of storage units (21) arranged in an array manner, each storage unit (21) being used for storing data with L bits, and L being an integer not less than 2. The peripheral circuit is used for writing one or above convolution kernels into the resistive random access memory array in a storage mode, inputting corresponding elements in a pixel matrix into the resistive random access memory array in a calculation mode, and reading current of each column of storage units (21), wherein each column of storage units (21) correspondingly stores one convolution kernel, one element of the convolution kernel being correspondingly stored in one storage unit (21), and one element of the pixel matrix being correspondingly input into a word line connected to one row of storage units (21). The storage and calculation integrated circuit can achieve the convolution operation in a neural network and can improve the recognition accuracy of the neural network.
Inventors:
ZHANG FENG (CN)
SONG RENJUN (CN)
SONG RENJUN (CN)
Application Number:
PCT/CN2020/103791
Publication Date:
December 16, 2021
Filing Date:
July 23, 2020
Export Citation:
Assignee:
INST OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES (CN)
International Classes:
G06N3/063
Foreign References:
CN106530210A | 2017-03-22 | |||
CN111146236A | 2020-05-12 | |||
CN106846239A | 2017-06-13 | |||
CN109800876A | 2019-05-24 | |||
CN106847335A | 2017-06-13 | |||
CN110852429A | 2020-02-28 | |||
US20200075677A1 | 2020-03-05 |
Attorney, Agent or Firm:
BEIJING BRIGHT & RIGHT LAW FIRM (CN)
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