Title:
STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/074969
Kind Code:
A1
Abstract:
Provided is a storage device which can be miniaturized and made highly integrated. This storage device has a configuration having a capacitive element formed directly below a vertical transistor, wherein one electrode of the capacitive element is shared with either a source electrode or a drain electrode of the vertical transistor. Therefore, it is possible to provide a storage device in which the overlapping area of the vertical transistor and the capacitive element is large, and which has a high degree of integration. In addition, since the area ratio of the capacitive element to the cell area can be increased, the capacitive element can be formed with a low profile, and a thin-type memory cell array can be formed.
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Inventors:
SAITO TOSHIHIKO (JP)
MATSUZAKI TAKANORI (JP)
YAMAZAKI SHUNPEI (JP)
MATSUZAKI TAKANORI (JP)
YAMAZAKI SHUNPEI (JP)
Application Number:
PCT/IB2023/059840
Publication Date:
April 11, 2024
Filing Date:
October 02, 2023
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H10B12/00; H01L29/786
Foreign References:
| JP2022049605A | 2022-03-29 | |||
| JP2016149552A | 2016-08-18 | |||
| JP2005303109A | 2005-10-27 | |||
| JP2018041958A | 2018-03-15 |
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