Title:
STRUCTURE AND METHOD TO FORM A THERMALLY STALE SILICIDE IN NARROW DIMENSION GATE STACKS
Document Type and Number:
WIPO Patent Application WO/2011/056313
Kind Code:
A3
Abstract:
An integrated circuit is provided including a narrow gate stack having a width less than or equal to 65 nm, including a suicide region comprising Pt segregated in a region of the suicide away from the top surface of the suicide and towards an lower portion defined by a pulldown height of spacers on the sidewalls of the gate conductor. In a preferred embodiment, the spacers are pulled down prior to formation of the suicide. The suicide is first formed by a formation anneal, at a temperature in the range 250°C to 450°C. Subsequently, a segregation anneal at a temperature in the range 450°C to 550°C. The distribution of the Pt along the vertical length of the suicide layer has a peak Pt concentration within the segregated region, and the segregated Pt region has a width at half the peak Pt concentration that is less than 50% of the distance between the top surface of the suicide layer and the pulldown spacer height.
Inventors:
OZCAN AHMET S (US)
LAVOIE CHRISTIAN (US)
DOMENICUCCI ANTHONY G (US)
LAVOIE CHRISTIAN (US)
DOMENICUCCI ANTHONY G (US)
Application Number:
PCT/US2010/049901
Publication Date:
August 18, 2011
Filing Date:
September 23, 2010
Export Citation:
Assignee:
IBM (US)
OZCAN AHMET S (US)
LAVOIE CHRISTIAN (US)
DOMENICUCCI ANTHONY G (US)
OZCAN AHMET S (US)
LAVOIE CHRISTIAN (US)
DOMENICUCCI ANTHONY G (US)
International Classes:
H01L21/336; H01L29/78
Foreign References:
| US6291354B1 | 2001-09-18 | |||
| US6461951B1 | 2002-10-08 | |||
| JPH0974199A | 1997-03-18 |
Attorney, Agent or Firm:
MAC KINNON, Ian, D. (2070 Route 52Bldg. 321 M/d 48, Hopewell Junction NY, US)
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