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Title:
SUPER-JUNCTION SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/036792
Kind Code:
A1
Abstract:
The present disclosure relates to the field of power semiconductors, and particularly discloses a super-junction semiconductor device and a manufacturing method therefor. The manufacturing method comprises: etching a first predetermined region of a wafer by means of a deep trench etching process to obtain at least one Ai deep trench, and filling the Ai deep trench with a first epitaxial layer having a doping concentration of NAi to form an i-th-layer epitaxial pillar of a first conductive type; etching a second predetermined region of the wafer by means of the deep trench etching process to obtain at least one Di deep trench, and filling the Di deep trench with a second epitaxial layer having a doping concentration of NDi to form an i-th-layer epitaxial pillar of a second conductive type; and repeating the steps above to manufacture a super-junction structure in the wafer. The technical solution solves the void problem caused by the conventional single epitaxial filling of deep trenches. The method is mainly used for manufacturing a super-junction semiconductor device.

Inventors:
ZHAO DONGYAN (CN)
XIAO CHAO (CN)
CHEN YANNING (CN)
SHAO JIN (CN)
FU ZHEN (CN)
LIU FANG (CN)
TIAN JUN (CN)
ZHANG QUAN (CN)
YIN QIANG (CN)
Application Number:
PCT/CN2022/132497
Publication Date:
February 22, 2024
Filing Date:
November 17, 2022
Export Citation:
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Assignee:
BEIJING SMARTCHIP MICROELECTRONICS TECH CO LTD (CN)
BEIJING CHIP IDENTIFICATION TECH CO LTD (CN)
STATE GRID CORP CHINA (CN)
International Classes:
H01L21/336; H01L29/06; H01L29/78
Domestic Patent References:
WO2018107429A12018-06-21
Foreign References:
CN115064446A2022-09-16
CN106684120A2017-05-17
CN114823531A2022-07-29
CN111863623A2020-10-30
US20060043481A12006-03-02
Attorney, Agent or Firm:
SCIHEAD IP LAW FIRM (CN)
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