BACKGROUND OF INVENTION

With increasing reactive loads in power system the current in electrical power systems are increasing to deliver real power. This is leading to increased power losses, overloading and reduced reliability of power equipments, and reduced voltage stability margins. This also gives rise to increased electromagnetic effects in power systems which affect the efficiency of the electrical systems attached thereto.

This necessitated application of reactive power compensation systems to compensate for the capacitive or inductive reactive power consumed by the load. Generally, majority of loads are inductive and hence most of the reactive power compensation equipments generate capacitive reactive power. Since the loads are most often not steady, but are time varying in nature, the value of the reactive power required is not constant and the reactive power compensating equipments have to deliver variable reactive power.

There exist equipments which may be used for compensating the reactive power. One such reactive power compensating equipment is fixed shunt capacitors. These are fixed capacitors connected in parallel with the loads requiring capacitive reactive power. These capacitors are either single phase or multi phase and multi phase capacitors are configured as either star (Wye) or delta. While this type of reactive power compensation is very simple, cost effective, but has the disadvantage of being able to deliver only fixed reactive power. To overcome this problem to an extent switched shunt capacitor banks are used. The total capacitor bank is split into multiple steps with a switching device for each step. All steps are connected in parallel and required step is switched ON or OFF depending upon reactive power requirement. In the conventional switched shunt capacitor bank each capacitor step is provided with a series switching device. A first capacitor of value Ci is provided in series with a first switch, and a second capacitor of value C ₂ in series with a second switch. The said capacitor bank has two steps each of which can be activated separately by switching respective switches.

For example if first switch is closed, then the first capacitor gets connected to the circuit and delivers an output reactive power depending upon the system voltage and frequency. The reactive power output will be

0, = 2 π ί Ο ,ν ₀ ²

Where,

Qi is the reactive power delivered,

f is the system frequency

Vc is the voltage across capacitors

Similarly if the second switch is closed, second capacitor gets connected and delivers a reactive power output proportional to the second capacitor value C ₂ . If both the switches are closed, then both the capacitors, are connected to the line and the reactive power delivered is proportional to the equivalent capacitance of Ci and C ₂ in parallel, i.e (Ci + C ₂ ). Therefore, the switching combinations are limited to three for the available two capacitor steps in conventional switched capacitors. Each of the conventional switched shunt capacitor bank are generally replicated in each phase to provide for a three phase delta configuration or a three phase star configuration.

Further, there exists various type of reactive power compensating equipments such as synchronous condenser or synchronous generators, thyristor controller shunt reactor, advanced static var- compensator using high speed semiconductor switches such as IGBT. However, each of the above identified equipment for power compensation may be either complex, expensive and/or generate harmonics and increased power losses.

Furthermore, there also exist systems for power compensation having more than one type of power compensating equipment. Various types are combined as to obtain a configuration which may work better than opting for one of the available solutions.

Of all the types of reactive power compensation equipments, switched shunt capacitors are the most popular owing to their simplicity and lower cost. However, the lowest value of capacitance is limited by the lowest capacitor value and the number of switching combinations available for limited number of steps.

Furthermore, in the switched capacitor banks the capacitors may have residual charges during switching. This leads to reduced life of the capacitors and the overall system. This residual charge may also lead to inrush current spikes during switching operations, creating current and voltage transients which are injurious to the system and other connected equipment.

Most conventional switched capacitor banks, especially applied in low (less than 1000V) voltage system use a delta connected capacitor unit and a switching device which is external to delta formation. In such cases the switch carries the rated line current of the capacitor bank, which will be 3 times the capacitor current (Ic) and therefore needing higher current rating switch.

Qbank = V3 . V _L . I _L

VL is the line voltage and II is the line current.

\ _c = 2 n f C \ _c

In case of delta connected system, with switch external to delta formation,

Is witch ⁼ IL ⁼ ^3 I-c

Vc=Voltage across capacitor

Therefore there is needed a capacitor bank providing an efficient and safe means for providing wider range, increased switching combinations and increased resolution, which may help in providing reactive power compensation to varying reactive loads.

Ojects of the Invention

An object of the invention is to provide a switching system for power capacitors which provides wider range of output reactive power for a given number of capacitor steps.

Another object of the invention is to provide a switching system for power capacitors, which uses switches of lower current rating to switch capacitors. Another object of the invention is to provide a switching system for power capacitors which enhances the life of switches and capacitors.

Yet another object of the invention is to provide an economical, efficient and safe capacitive reactive power compensation system. BRIEF DESCRIPTION OF THE DRAWINGS

Reference will be made to embodiments of the invention, examples of which may be illustrated in the accompanying figures. These figures are intended to be illustrative, not limiting. Although the invention is generally described in the context of these embodiments, it should be understood that it is not intended to limit the scope of the invention to these particular embodiments

Fig. 1 illustrates a two step switched capacitor bank according to one embodiment of the present invention.

Fig. 2 illustrates a three step switched capacitor bank as per one embodiment of the present invention.

Fig. 3 illustrates a two step switched capacitor bank having damping / detuning reactance according to one embodiment of the present invention.

Fig. 4 illustrates a three phase two step switched capacitor bank in delta configuration according to one embodiment of the present invention.

Fig. 5 illustrates a three phase two step switched capacitor bank in star configuration according to one embodiment of the present invention.

Detailed Description of the Preferred Embodiments

A switched capacitor bank operable in multiple switching combinations in an alternating current power supply is described. In one embodiment of the present invention the capacitor bank is described having two capacitor steps in a single phase power supply. In another embodiment a polyphase switched capacitor bank is provided.

Further, a multi-step switched capacitor bank allowing numerous step additions to provide for additional switching combinations and better resolution is also provided. Each of the above embodiments are described with reference to a limited number of capacitors as referenced in each embodiment, but a person skilled in the art would appreciate that each of such capacitors can be replaced by multiple capacitors.

Also, various types of capacitors may be used. The switches used may include mechanical or solid state switches.

In the following description, for purpose of explanation, specific details are set forth in order to provide an understanding of the invention. It will be apparent, however, to one skilled in the art that the invention may be practiced without these details. One skilled in the art will recognize that embodiments of the present invention, some of which are described below _; may be incorporated into a number of different switched capacitor banks. It is understood that one skilled in art may modify or change the data used in the examples described in the specification.

Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, characteristic, or function described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment. As per one embodiment of the present invention a switched capacitor bank operable in multiple switching combinations in an alternating current power supply is described with reference to figure 1. The figure 1 shows . the version comprising of two capacitor steps.

The capacitor bank comprises of a first capacitor (102) having one terminal connected to a power line (141) and the other terminal connected to a neutral line (143) through a first switch (1 12). This provides for a capacitor step of the switched capacitor bank.

Further, a second capacitor (104) having one terminal connected to the neutral line (143) and the other terminal connected to the said one terminal of the first capacitor through a second switch (1 14) is provided thus providing another capacitor step of the switched capacitor bank.

A third switch (1 16) is provided across the junction of the first capacitor (102) with the first switch (1 12) and the junction of the second capacitor (104) with the second switch (1 14). The said switches may be switched manually or automatically to provide for various switching combinations. The switched capacitor bank of this configuration facilitates six switching combinations out of which four are output combinations. The output combinations imply different power output.

The various switching combinations on which the said switched capacitor bank may operate comprises of a first switching combination having the third switch in closed position while the second switch and the first switch in open position. This switching combination provides for series connection of the said first capacitor and the said second capacitor. For example if the capacitance of the first capacitor is of a value CI and that of the second capacitor is of the value C2 the equivalent capacitance would be Cs = (CI C2) / (CI + C2). The voltage across each capacitor will be less than the system voltage, for which each capacitor is rated, since the system voltage would get divided between the two capacitors.

The current through the capacitor will also be lower than when each capacitor is individually connected to the system. This will enhance the operating life of the capacitors since in this switching combination the thermal and dielectric stresses are much lower than nominal stresses. Further, this switching combination also helps in providing a net capacitance lower than that of the individual capacitor steps. Which implies reactive power -lower than that provided by individual capacitor steps. Thereby an increased overall range of capacitance may be derived from such switched capacitor bank. It may be noted that the number of switching combinations of the capacitor bank is increased to correspondingly increase the range of reactive power delivered by the capacitor bank.

A second switching combination may be provided by having the second switch in closed position while the first switch and the third switch in open position. In such switching combination, only the second capacitor is brought in the active circuit. Further, the first switch in closed position while second switch and the third switch are in open position provide for a third switching combination having the first capacitor in the active circuit. It may be noted that the value of the lowest value of the capacitance possible is not restricted by the least value of the capacitor available, since the series combination of the said capacitors provides for a lesser value of the capacitance as compared to individual capacitor steps.

In another switching combination, termed the fourth switching combination, the second switch with the first switch in closed position while the third switch is open provides for the first capacitor in parallel to the second capacitor in the circuit. Further, the embodiments of the present invention in few of the switching combinations also allow the excess charge on the capacitors to discharge quickly. In this embodiment the second switch (1 14) with the third switch (1 16) in closed position while the first switch (1 12) is open provides for one of such switching combination, termed fifth switching combination. The first capacitor (102) is shorted allowing for a quick discharge path.

Similarly, the second capacitor may also be shorted by closing the first switch and the third switch while the second switch is open. This allows the first capacitor to be in the circuit while the second capacitor is shorted allowing for the quick discharge thereof. This switching combination is termed the sixth switching combination.

In one embodiment herein a switched capacitor bank is provided having multiple steps allowing multiple switching combinations. Across the switched capacitor bank as shown in figure 1 , at least one twig containing a capacitor and a switch in series is added.

Figure 2 shows an exemplary embodiment herein where a three step version of the said capacitor bank is provided. For the three step version one twig containing a third capacitor and a fourth switch in series, connected across the power-line and the neutral-line is added to an existing two step version of the capacitor bank as in figure 1. Using four switches namely (212, 214, 216 and 218) along with three capacitors (202, 204 and 206), thirteen switching combinations are provided, excluding the switching combination having all the four switches open. This embodiment facilitates for thirteen switching combinations out of which nine are output combinations. More particularly, all the switching combinations available in the two step version of the said capacitor bank are provided, in which the fourth switch (218) would be in open position. Further, multiple switching combinations would arise by switching combination of switches when the fourth switch (218) is in closed position.

More particularly, the fourth switch in closed position while the first switch, the second switch and the third switch are open provides for a first additional switching combination having the third capacitor in the circuit. The fourth switch along with first switch in closed position while the second switch and the third switch are open provides for a second additional switching combination having the first capacitor in parallel with the third capacitor in the circuit. The fourth switch along with second switch in closed position while the third switch and the first switch are open provides for a third additional switching combination having the second capacitor in parallel with the third capacitor connected in circuit.

The fourth switch along with the first switch and second switch in closed position while the third switch is open provides for a fourth additional switching combination having the first capacitor, the second capacitor and the third capacitor in parallel connected in the active circuit. The fourth switch along with the third switch in closed position while the second switch and the first switch are open providing for a fifth additional switching combination having the third capacitor in parallel to the series combination of the first capacitor and the second capacitor.

In one embodiment each of the capacitors present may have a reactor in series connected with each, to one of their terminals to allow for damping, detuning and current limiting. The reactors may be of same or of different values. The reactor also allows modifying the tuning frequency of the circuit. This further enhances the applicability of the said capacitor bank for the power compensation since the occurrence of the surge and spikes in the current may be reduced and amplification of harmonics is minimized. The value of series reactor may be specified by tuning frequency or impedance of the reactor as a proportion of the impedance of capacitor concerned. Some of the standard tuning frequencies used with 50 Hz power systems are 133.6 Hz, 188.9 Hz, 204 Hz, 210 Hz, 1 1 18 Hz and these correspond to 14%, ^' 7%, 6% , 5.67% and 0.2% impedance of the capacitor bank. These correspond to 2.7, 3.8, 4.1 , 4.2 and 22.4 multiples of fundamental frequency.

Figure 3 shows the version of the capacitor bank unit having two capacitor steps along with the damping reactors. As seen therein, a damping reactor each is connected in series to each of the said capacitors, the first capacitor 302 and the second capacitor 304. The corresponding reactors 322 and 324 are connected to one of the terminals of the said capacitors respectively. Similarly in, a three step version of the said invention as explained with reference to figure 2, a damping reactor may also be connected in series to the third capacitor. For those skilled in the art it will be evident that the tuning frequency as a multiple of fundamental frequency will not be altered and will remain the same with all switching combinations, including series connection of any of the steps.

In another embodiment of the present invention a polyphase switched capacitor bank is provided. The polyphase two step switched capacitor bank is explained with reference to an exemplary embodiment having three phases as shown in figure 4 and figure 5.

The figure 4 shows the exemplary embodiment of the invention having the delta configuration of the said three phase capacitor bank. Between each phase the said bank comprises a first capacitor (402a, 402b, 402c) having one terminal connected to one phase and the other terminal connected to the other cyclically consecutive phase through a first switch (412a, 412b, 412c). Further the bank comprises of a second capacitor (404a, 404b, 404c) having one terminal connected to the said cyclically consecutive phase and the other terminal connected to the said one terminal of the first capacitor through a second switch (414a, 414b, 414c) and a third switch (416a, 416b, 416c) provided across the junction of the first capacitor with the first switch and the junction of the second capacitor with the second switch.

The switches present between each cyclically consecutive phase may be gang operated. Such switching of the various switches would lead to various switching combinations. Various switching combinations would be similar to the single phase switched capacitor bank as explained above. For example, the third switch between the phases 441a and 441b, ie. 416a, the third switch between phases 441 b and 441 c i.e. 416b and the third switch between phases 441c and 441 a, i.e. 416c all in closed position with the second switches and the first switches in open position provides for a first switching combination having the first capacitor and the second capacitor in series.

In the exemplary embodiment of the polyphase switched capacitor bank in star configuration as shown in figure 5, each phase of the said bank comprises of a first capacitor (502a, 502b, 502c) having one terminal of each connected to respective phase and the other terminal connected to the neutral line (543) through a first switch (512a, 512b, 512c). Further there is provided a second capacitor (504a, 504b, 504c) having one terminal connected to the neutral (543) and the other terminal connected to the said one terminal of the first capacitor through a second switch. Further, a third switch (516a, 516b, 516c) provided across the junction of the first capacitor with the first switch and the junction of the second capacitor with the second switch leading to multiple switching combination in three phase capacitor bank in star configuration. Though the said exemplary embodiment is explained with reference to three phases it is obvious to a person skilled in the art that the said exemplary embodiment may be adapted to be used in four or more phases. In each case, the neutral of all phases would be common or joined.

Similarly, polyphase multi step switched capacitor bank may also be provided by using the single phase version of the three step switched capacitor bank connected as explained above in a star or delta configuration.

Examples that follow are described for illustrating working of the invention during particular values of the capacitance used. These examples are illustrative of the invention but not limitative of the scope thereof.

Example 1 : The capacitor bank with two equal steps

Total reactive power output = 105 kvar

Reactive power of one of the capacitor step = 52.5 kvar

Reactive power of another capacitor step = 52.5 kvar

Possible output combinations

All switches open = 0 kvar

Only first switch closed = 52.5 kvar

Only second switch closed = 52.5 kvar

Only third switch closed = 26.25 kvar

Only First switch and second switch closed = 105 kvar

Neglecting the condition with zero output the number of discrete output combinations is 26.25, 52.5 and 105 kvar, i.e three different combinations. The smallest output achievable is also smaller than the individual value of the capacitor and therefore not limited by the value thereof. Therefore the total range of values available for the capacitor bank increases.

Example 2: Proposed arrangement with two binary steps

Total reactive power output = 105 kvar

Reactive power of one of the Capacitor Step = 35 kvar

Reactive power of one of another Capacitor Step = 70 kvar

Possible output combinations

All switches open = 0 kvar

Only first switch closed = 35 kvar

Only second switch closed = 70 kvar

Only third switch closed = 23.3 kvar

First and second switch closed = 105 kvar

Neglecting the condition with zero output the number of discrete output combinations is 23.3, 35, 70 and 105 kvar, i.e four different output combinations which is more than what is possible with conventional two binary step design. The smallest output achievable is also smaller than what is possible with conventional switching arrangement.

Similarly the various possible output combinations for three capacitor steps or more capacitor steps with equal and binary configurations may be computed and in all cases a person skilled in the art would appreciate that the proposed switched capacitor bank offers more combinations of outputs and wider range of capacitive reactive power.

The foregoing description of the invention has been described for purposes of clarity and understanding. Although embodiments of the present invention have been described relative to a few standards, and associated attributes therein, one skilled in the art will recognize that the present invention is also very much applicable to other such standards. It is not intended to limit the invention to the precise form disclosed. Various modifications may be possible within the scope and equivalence of the appended claims.