Title:
SYNCHRONIZATION CIRCUIT AND CONTROL METHOD FOR SYNCHRONIZATION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2017/119183
Kind Code:
A1
Abstract:
The purpose of the present invention is to suppress malfunctions of a synchronization circuit that captures a data signal in synchronization with a periodic signal.
This synchronization circuit is provided with a holding unit and a variable delay element. In the synchronization circuit provided with the holding unit and the variable delay element, the holding unit holds an input signal in synchronization with a predetermined periodic signal. In the synchronization circuit provided with the holding unit and the variable delay element, the variable delay element delays the input signal and/or the predetermined periodic signal by a random delay time, and supplies the delayed input signal and/or predetermined periodic signal to the holding unit.
Inventors:
ZHOU ZHIWEI (JP)
MASUDA TAKASHI (JP)
MASUDA TAKASHI (JP)
Application Number:
PCT/JP2016/082951
Publication Date:
July 13, 2017
Filing Date:
November 07, 2016
Export Citation:
Assignee:
SONY CORP (JP)
International Classes:
H03L7/08; H03L7/081; H03L7/089; H04L7/033
Domestic Patent References:
| WO2010016301A1 | 2010-02-11 |
Foreign References:
| US5331217A | 1994-07-19 | |||
| JP2014045268A | 2014-03-13 | |||
| JPH07336215A | 1995-12-22 | |||
| JP2013176125A | 2013-09-05 | |||
| JPH11186880A | 1999-07-09 | |||
| US20030050030A1 | 2003-03-13 | |||
| JP2010252244A | 2010-11-04 | |||
| JP2012516092A | 2012-07-12 | |||
| JP2014187561A | 2014-10-02 |
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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