APFI _v ICATIOM FIIOCESSCIR IIO T IFEOW

DBSCMFTIFN OF Ti iB RIfL AThD ART

fOOO! | FortaMe eo ptftlilg devtees fPCOi) are becomin : Peccssii as Awpeogte rat pdrson&f an hmlessidnal levels, These deftiftes ffisy Mc!ftftft ce!lftlar teiephohes;, po e dlghftt assistants o ^; FI¾As" g por ahle game palmtop co pdimw ao other non. side elec troftl a devices,.

f00Q2| POOs commonly :: wulnn a complex. system termed n mobile chipset or sy ste on a clap f HoC ;> the AF is gene; Ply the overall supervisor of me lunch cos ddivewd by the SuC a mg ag Shell, remains ftwske and consuming power dtrftng airnoss any acih by of the SoC. For vsampky - ft s ste s ftrnl nmthodS known to the atl wlw the foedenr of a SoC eeives ¾ trm ofy page thftt fspi ires some hittd of ptoeesslo attendcm, i:he modeth will signal the AF to take Oyer processing of the memory peso At uns pomt the AF is hooted the its executing program and wtli remailwft eonstam eoninxuftieatiOft vbth the static rs iiloio-ooeess nwworv ft PR \ ^' .· or dTftftptte t¾itdoowaeeess memory r DRA m ay the mentory component) tmdl the page is processed

f)00d| Tim AF, Which pra he a nry llAeore poesshw eontponent, eoosconex signitmant amounts of power hen it stays tip and: running: at ft relatively high iteqfteftey, such as when the AP is supe vising a hots door As such, power sayings So the SoC ay he sw med if the AF poold he powered down .: or otherwise given the oppor tysi ly to r nsttioo from ftn active processin stale t ftn, idle state (sometimes termed a Asleep sta e" or Aieep tnodeT) that consumes less o er.. SlMllarty, further power savings may he r alised whep the power suppl ied to dm PRAM associated with ah AF Is lowere Or removed. Systems end methods ip the phot art hav faded to fin Ways to exploit these m¾as of power savings dslng a foo Segueftee,

[0004] AccosFlpgly, ltst is .needed in th art Is a method end system for rewovmg o mlmmifti _h githe need p> leverage an AF and Its associated PR AM doring, a boor seguenes, More specifically, what Is needed In the ftti is ft system and method for a nokf eatMk¾c:ied apgl ieatksn processor hoot flow. miMMART o THE ISCLO IRE

fOCidd J R¾fta embodiments of m:ethods aad systems ifir a: mstdemMi:re;cted appBeadeo rocessor boot flo fit ¾ portaMe costs puling device pTCD;") am disclosed An ese plary tBolhpd . elodes an application proeessmy ailer reeeivtfig :nobieadoo Ro a tan e that m ¾&gei me ory requires some ataion, Imiialfeinga direct memory access g'DMAA) engine and a crypto engine, lido D A engine an Ido crypto engine may he associated with aT!ash eogisotier for an ea ero L n mY iatlie memory dm· lev (e g, a Hash ensem . ekuricady erasable: progdmoosble read-only emory UTTudlOM 0. magnetDfesisdve wndwe-aceess nmnsosy ( MR A.Vf ), phase-change random-acdesa etnoty ( PRAM ^" _. ferroelectric randotBAtceesc emoty f TcAAM ^' }. carbon nauofebe RAM if AXA ^' d etc, f The DMA engine A eoebggred to tend date ri on s dm omiBory co ponent and the ety pio engine is eooiigoted to eaieolate a hash according to e predetermined hash Jkneuoo The application processor atraets the DRIA engine to road metadata end data segments associated -with the imago The Ifrΐΐooίΐqh processor afspdnstrgets the crypto engine tA c teoiare hash vahtey associate midmho :metadata and data segtno a. And, tho application processor traasltl Bs Into m idle stein, such as a WFI state _^ dor dum tOB of dme coseelrilngwtth proeossln hy the DMA engine and/or crypto engine. Thai Is, the application: processor may Mieep ^::> svinfe dm D A engine end/or crypto engin process workloads In response to Instructions they received BOpr the application processes Advawageonsiy. when -he application processor is In the Idle state It consumes less power than when in an active processing state and so embodiments of the solution real ; power savings ov er prior art methods that kee the: application proeesmr an active state IhroughcsUt a hoot proem;;.

[0000:1 An eswrapkry embodiment of the solution In the form; of a co puter system: for Btodom -directed application processo hoot f1 ut la a poAsbie confuting dev iba _; f'FCDM that comprises an ap lication processor. The application processor Is conOgu R IC loidaliao a direct: Memotf access TS A”) engine that is conllgured to read data from a memory component, inalfee a crypto engine that Is c nfigure to calculate a has scoordlrtg to a predetermined bask Mno ion, I struct the DMA engine: m read metadata and data segments associated ith an image storod in a memory eon ouent Instruct the: crypto engine to eatcutate hash: values associated with the metadata and data segments, and tran ition Into an idle stale for durations of time coinciding; wit prOcea ing 0v -be DMA engine and/or crypto engine [OOQb] .Another emunplary ebthodhneM of fhosolohon id the form of a eontputer system fht a medem-ki reefed spplkatkm processor boot flow t pottable computing device GFClD^l eoiJr tis s ihbat a tor Ihitislklng a dlfcet dterooty accesyfddMAM sngioef bet is eeafigete to read data ilxuo a memory component, mearsa tor 1 ailsikiog a crypto engine that: is configured to calculate a bash aeoordmg; to a predesemtined hash ikeciko, means t¾.v fnsfruebdg the DMA engine, to reed metadata. arid data segments associated with in - ge stored a memory componetk means for insoucPng the crypto engine to calculate hash values: associated v dh the metadata and Pi segments. ami amass for transi honing an application processor into an idle state for dtirapofta of time coinciding with ptoeessieg by the D A engine aod/Or eryplo engine

[hood f A iioiiier e vedtpl ary eotbochme of the solution lb the form of computer progra product compri es a computer usable medium has y a computer readable gro rapt code eioPodled f berk ft that k adapted to be ev eeted to implement a method for odPuMikeefed application processor boot How In a rohhMo computing device ridTf !, saidad ibotd eomprlsibg loidalkbug a dl reet memory access fiOklAM engine that la configured to read data from a menaory eamponshg kifla!king a Of pto engine that is configured: to calculate a hash aceotxBng to a, predelet sned bash llrncito ,, instructin the D A engine to read tnetsdafa and data segments associated w¾!V an la; sac stored lb a men any component, ibsisoetmg the crypto engine to calculate hash values associated with the oietudgta and data teg; nemv and uensiuodiug an application processor legs an Idle stale tor durahops of time solbcidkg with processing by the DM A cbghte audfor cry pto engine.

BRIEF ESCMrriQN OF THE DRAWINGS

[AtRIAi le the Fta h like eietehee «uatsw&ls r«3¾f to like parts throughout the various v e s uoteas otherwise i odleakd Far reierertee wlih letter ebaraeter deslgoalkes such letter ehaesefef designed Ous «lay differentiate taro like parts or elepredts gseseut the seme figure. Better oliaraster heal goah oea :S¾t- rel¾reeee aupserpia fray be otnkted whebdt k rmeoded that a odes ebee eiaweral: to encompass all parts hevirsg the same reterebce buraerai la all figures,

[00101 FIG. 1 la a ihoepoeal block

chlp aystept los-eaecu hg a mode -directed application processor boot flow:

-M [0011\ fifCi 2 Is st fkdebonat blech: diagram of an esempihry, don film king aspect of a PCD in the form rtf a wireless telephone Er inepietneffiing ntethods and ay stems fir roods® _' directed application processor boor flow;

[00 I iff FIG 3 is a sepoeoee di grstm kkrsirating an essmplssy embodiment of a tnet od for modemoJireete application processor boot Sow according to the sokrtirap [OfifDf FIG 4 is a sequence diagram utustmhng another eaempiary embodiment Of a method fin mode ©1 reefed agpfieafioo processor boot How- according t tbe sob moo. apd

[0014 j FIG. S is a high level fisnefloea! flock diagram dhispafiog an exemplary archttoctare of a syste for advantageously leveraging a device configured for a mod emwlkecfed igpl leaden processor boor Sow,

OETA /EB D!BSCRirriQN

{fib i a} The wotfi " emffiaty" i used berei n to mean "serving as an ckamg! a, instance, Or hJnMrah:0OT Any aspect described heroin as "eaerfipsary ^* fenot neeessatfiy ns be construed: as enekndve preferred or advantageous over other aspects

f 00 idj Id this deserlgfiow the term "app!icahon" may also include files havin uaeontab!o content;, such as; oh|eci code, scri ts, byre code markup iauguagefiie ;, ad patches in addihon, an appheahon” referred to herein,, may also ΐrqΐoόo files that are not owe uiab I e i natwe. such as document dun. may nee to be opene o ohter dm a files dun -we to be accessed.

[GO f?1 As used Aotnponetnfi“

"systemT“thermaS energy genomfing component" "processing OOmpoqenfT

"pfoeesfing engine " "appbeafiau t a of’ aod the li e are lEfisp fed to refer to a cootp itewmiated entity, either k®i:E:wprop iPt Pto, a «omlslt tloo of hardware and software, software, or software in oaooutlop apti rep aap t esontplarg moans for providing file Ibnciodalky Pad performing d¾ eerral steps ip tits processes or process So s desenbed io his spseifiesfiotr For etosropie, a eotnponeo† may ho, but is not limi od to being, a process rt ning cm a processor, a pOooss r, so cdtjeep ap esficifiaMfi a thread of eaecuticm , a program, and/or y c mputer By way of IhrSt alon, both so application iming on a cfsmpcding device mid tire computing device may be a ©tie or mm® cmnponeshs tony reside withi a process aod/or thread of exeouhOin and a component may be ioeeliaetf do one computer and/or tEatnbtped between two or more co puters. In addition, these oommoneots sy egeeufe fro® v b tis computer readable - e ia having various data Sirucrmwa smred thereon Tbe remote processes ek- imnmdauce with a signal having one or note ata g selects (e®, data. from one:

component fmeracdog w th another component a loca ay stern, distrihrtteh ¹ system, aw:.l - across a network such as the inlernebwhh ether systema by wa of tfee siguaiy 1 j M j lo hdb description, me terms "centra i processing noil ( CPIJ V 'diguai signal processor f PSP V ^' appheatbw pr- H.CSSO;- C ^' AF A ^" char and "eM seA are pood ho t ti ng esamp!es of processing components that may nvade le a F€P sox! are used irherohaugeabiy except when otherwise indicated. Moreover, as disoogaisfeed ift t is description, ¾ GPU, DSP, LR or a chip or chipset ay he comprise of dm or more bind net _/ fwoeesslag oornponeorygaoeralty referred to herein as ¾ote(x)./ ^'

|IK 1¾ fe this description,: re!ference tcwMsferna! utbma ydbvics ⁵ en the like refers to a broader class of noewrdabfe (fee , re tat as its data after power Is removed} progra mable memory and wilt pot ham dm scope of the so!mioes disclosed. As stick ft will be understood that ttse of the lerros envisions any programmable readwmiy memor or Sekfpsogra matde ooow-ntshte etemer sihtable for a glmcrv application of a solution seed as, bra not limlietl by embedded ntuMmMia emb (A GM memory, .fefFROM. Clash memory etc

j Oudb] In this description- the term ;A<atehle oorttpoting device" PCD ^:" ? I use to describe any device opemhng or a homed capacny power sopp!y, soch as a battery It will be imde oob, therefore, that a PCD ay fee any device that falls -within such a definition ami so wonfd Include hoed location devwes such as, but pot limited to, ajar station pomp, a utility nmier (he, a mstorai gas Meter; a water meter; an eieeirfcal consumption meters etc.), a device that Is ap of a aecorlty MaletP, an entire security system, etc A PCD may be characters aed as an Internet of Things (!oTfdessce as -will t he described more fhlly in epnneohcn with FICI 5.

^" j¾0 1 ) Although battery Operated Da have been in use lor decades, teehisofogieai advances in tcehatgeablc batteries con pied i h the advent: of thud generation poGT and fourth generation fACf A wlrefesr technology have enabled ootaeroue PC s with multiple eapablbbes. Therefore, a PCD may fee a ee!iniar telephone, a satellite telephone., a pager, a FDA, a smartphone, a navigation device, a: tablet, a sm rfbooh or reader, a media player, a combination of tbe aftirooraotiemed devices, a _: laptop computer wi fh a wi ret ess "cm n cob on am ong others .

-:S-- S Ci' lj Is th s desctiga oit, the: tersy ⁱ DMA ebgimf refers S a d tear nsetaory access corngogent of the hoC that d!lo s can. ha hardware < subsysterns, such as. ¾: modem for eaaatp!e to avcess systee; and/or geripbersf me ory »¾®^»4& ίg fxmfs the centra! processing tmh €I ^S U”) or nppheaiioc procepoo

fet!Sj Is this description, dte torrwMrypto engine ⁵ ' refers to any processing vomnoge eoeB gored for gMteoti on of cry tegtap ie opera† loo s or itmcuons in response to - _:i reqserl from tor applioati processor or the ife

ffefekd) Is this desor ti h, the term: Aion Afecklng acfeacM! pa enr indicates as acknoo iedge em si gait! from one processing component is another sehessih the two coamnnen s are engaged is a xouware handshake As such, the current function of the Brat oosa poses; la sot ffeoehefe by t pending aeknowiedgenmnt from the wooed component. as would fee ooderaiood hy one of ordinary she! is the art. Within the contest: of the solmiotp tile te s ^:: nos4|!oclfeog acknowledgon-em envisions Ore reesatio liotma p tlrst eeisponest eoPStrnes to proeeas a workload unit! there Is aeknow!ednasoem ffoar a seeosd coptpooent: ifer the Brat component: to change its action, It I a easts! used, however, that a B at component^ recognition of a rma-feloclahg teknow!edgeotent: trots snofenr component may not dictate that the first eotgppeesn change !ta coarse of action, depending; on: recognition: of various other predetermined shuoi s. AN a nosdisdSisg example. to the proposed sostmon, while as application subsystem (AFShfiS waning tor weeps ot an hue; rapt ti e., a soa-ldoektsg

aehsowledgetsest) host a DMA engine to start loading a oust segment, the APSS otay continue to work hi eoesdisatioe with a crypto engine ns alternatively,, ent r into a low power consumption sleep state. If the AIMS negnrss some execution (e.g. i itiating das crypto operation) Instea of sleep, that may Also b per for e ; while it awaits receipt of a non-bloetdng acknowledgement. Advantageously, and as wife become better understood Dos; the following desedpdpn and associated f I lustrations, this helps la parafie!Izatfos of DM A engine operation and crypto engine operati n. ISy COOt sg i the acknowledgement is of a blocking type for AFSS (a opposed to a ooodt!nckipg typeos described above), such as has been owe la fete prior ark udyautsgeoos perafeeliaatios of the DMA and crypto engines: may be achievable,

BOSS] Is this description, the term 'latency ⁵⁵ is ganeot!ly used to yelUreuc fee dine si takes for a given pnscessing eoniponent to transition f tons a certain Idle state to as active state for processing _¾ workload, saeh as a boot sscinence. Mtdhpie Idle states ay be available tor a given eser p! ry core asd disrisguished ae B fn the other based o · -ait the fatdnpy sad the leakage powerof the core for each Idle state; C¾uera!!y speali ng, the higher the latency associate with a eertain idle stole he ^: ¾ the leakage rote (he., the lo er the power eonstsrngtion) Accordingly, as one of tudimsry skill in the arl will understand,, Idle state assoelatmf with a high latenc otay sil¾wi hettot power savings as contrasted to an idle state associated wi th a high leakage rate w ^: h:ick may afford rekdvely quicker response to _: a hoot sequence workloa .

[00201 lit this descrlpiow the tertns AooisfrapphtgA dteotf‘"hoo sequenegA and the like are meant to refer to the set _: of operations that so application processor perform rd the direction of atr ekece ipg image whea the Af s powered osr, Or resumes I roe· power saving modes, including, hot not I orated to. loadiog the operating sy tem^ subseqcetn Images eo espoed g lo dllfareat seenarlos stteh a.s taetotw provlstoo or nortBaT hooi op, and preparing the various PC i> eom ottents tor gse Terms such as ' ^’ ho phase ' and '" oot stag are m aot to: ret er to a portion of iet entire hoot sequence which one of ordinary skill i.n the art understands m he eol!eehvely comptoed of a series oftentgotally executed hoot stages:. A hoot sequence easy begin with a fh -stage hoot loader f ^’ FSBif ) stage followed by a second-stage: hoo loader :f‘S8BL/ A stage, a thlrb- stege hoot loader f AABif jr stage end s on, Nob/bly, evemptety embodiments of the solution are described: wuh!n th contest: of responding to a modem request to so. Ah to eonduef a hoo sequence and execute some action 1st response to an image rotueved from memnow however, it Is eovisiooesl that certain eitshoditpents of the sol mums may he applicable to AP supervised hoot sequences associated with other instruction and/or data sew stored In non-vpfstde rnemot

jllOifj f or convenience of describing the exemplary embodiments of the solution, this description refers to a’Avan for ter p AWFF } Idle s ate, _: although ft is envisioned that certain emhodl men is of the solution may he confsgu d to- take advantage of other processor idle states such g hut not: limited to, a retention idle state and/or a power collapse: idle state. Even so, embodiments of the systems and methods ate not linthed to just the three Idle states mentioned above or any particular

oomh atten of idle states. As one of ordinary skill m the art will en wsf n r any number of Idle states ay he tWaiiahte and employed in a PCD, each such state offeringvatyih latency levels and power savi g levels.

[002 h i By transitioning a memory component like BEAM and/or a eore or cotes of an At* from an active puxvssmg state to an idle tate duri ng a hoot sequence thereby removing power from power rails and allowing content stored in the memory ctanponenh/ ) to fee lost, embodiments of the solution MlvMeagcoUsiy enable power consu ption associated with the: active state of the AF ond/or eornt oeot to he avoided ,½ i Fbeetsmc ei ster fk - revie of th figures and the associated detailed descriptions below,, on AP ppty feestrsiefgeeily trimsi b oed im. m¹ out of n. FI stele den eg a boot seguenee by wcnting in para; lei with other hob coorpoueots, such as a D A ggg ge end a crypto engine, to handle various swps of the boot sequence to ho eg a subsystem Of the $oC out of reset In doing; so, the AP end so associniod memory eOntpOnefitihay require s u; d boot auShemwa lion the selves; owkqde h es die ; eg e beet sehdeoce: M a skbsy stem bp the So€ Ip order to supervise cerium actions lu the hoot .sequence.

jobdoi For etufeodiments; of the solution, boot end nutkenuoahon of the P hod. its associated memory decor O equonly to. g many dines so houri, y; elding nnoomum powe ssv I ggs diking supew isor of a hoot sequence tor a subsystem, The AP ay he boosed / authenticated often by the modem throughout the boot sequence Alter the AF does Its portion of the work m ^: the boor se uence, it shots down to the absohne lowest power state svad aide (e.g , power soil reomved, S AM lost content, .DRAM lost eontenfk after which the only way to retfern th AF to setvlce for the subsyste boot sequence A hy hoot/eetheotienti n of the AP and I ts awrnosy.

|¾03F| When a processing cote ethers a ATI A A state, its processor clock is stopped or ^* gawd oll c nosh ait Interrupt or debug even; occurs On this description, the interrupt event Is referred to as a "waheup interrupf or Wafeeup ^' "}. As sneh, according to embodiments of the presen t solution, the AF eoreisFi s no longer In an active state let processing a boot sequence wo rkle&d (thus saying power consumption) but remains ready to quickly tmoaiiion back to arc acti ve mate ¾ the evetP Shat an InterrupS: Is detected. Even though the cote Is not consu ing p wer for rocessing: a woskimsd he it is Ip the WftkISe state, voltage Is hkeiy still being supplied to the core and a owasotafeie current Inevitably re ains on tfee power supply rati of the core in the form of a leakage current Hblahly; the leakage current can fee directly correlated with the tcmperatore ef the cote: tie,, the j unotiog whpeta mof and theralore one of ordinary skiijnp tbe go: will recognise that measurement of the coreA Wmpcratnre can fee used to ealeu!atc its ongoing rate of power consumption (regardless of the particular idle state in wind; the core may be)

1001 1 1 Although eyenrplary embodiments of the sdlutioU _: arc described within the contest of tran si b o Ug au AF Ip and out of a WFt Mate during a hoot sequence it is en ironed that sem emhodnncnO ay leveMge O:s # aie¾ oihe? thaii the WFI ? <1 ; c state For example, certain emhedhuents «my transition aft AF and oat of a retention slate during; a oot seguenoe The Imterltion Idle stale la similar to the WFI dle state 1st that a. gWsessmg c m the retention state has dean ock gated. Fort er, thosmb, whan la the retention state the power aoitage seppHe to the pfocesslag cose is also seduced

A n advan tage of dm retentio slate over the E! state is that less leakage emieai A assoc! ale with the retention stale an . therefore, power sayings at the retention state is .improve over the WFI stale Notably, however, the latency dots for the processor to reuse so an active stats from the retention: idle stal is iPereased as root pares to transiiioalog bmm the WFI state.

fool 3] Yet another example of ao Idle stal that may he leveraged by embodiments of die sokrtion Is a power eo! lapse idle stale. As cantpweb to the retention idle states a process· eg core that eaters the power collapse Idle state Is ftiiiy cl ck d mo off powes Is removed froth: its power sop ply raid CAuwgoem!y:, die p er ssvmgs associated: with the power opdapse Idle state s |i«pioeet!: over the WFI an retention slates:, how ever the latency associated with the power eobapse idie state rs the longest io dumttorfef all three exempt a- v state de edked herein heesnse the bore most go through a ane: hoot segoencu in order to transition hack lo ao active slate:

i 0033 ] Again, the general deser ptloo of and reference to, he above three idle states that may he available to an esempkny processing component are of ^' iewd - or hkwwahve purposes only and ate not meant to Imply or suggest that embodiments of the systems and methods are only applicable to any one or more of these three idle stales it re envisioned that any nrsnlbor of idle slates may be leveraged by e bodi enls of lhe systems and methods. Some idle stales may clock gate a processor and/or redueedts power supply via software whereas other idle states way do so via hasciwam Simiiarfy:, In addition to _: clock gating and resinning power to a pmces sing corn otwnt soeh as an application pmcessor, sown idle states may further turn off mernory, dri ers, hns, hardwnte or the like A!emory components such as SEAM may enter a retention state, where t he volatile contents m the em ry array are retained, or :may enter a partial power-down state where only a bsepon of the array eoatents ar retained or may enter a dill pOwer-dOwn state whom the entire arra contents are lost and most be restored prior to use Memory components seek as DRAM ma enter a retention state, where the volatile contents in the memory arm are periodically reb oshed, ormny enter a partial powerwrnvu state where only a fraction of the array eon tents are refreshed, or may esuer 4A a full power-do n state here thfe ««ti e rwray oontosto are: tost and most bw esietcd iiii M use, Gyn entlly, thongd, th toory eairyto dw nmasotes taken th a gi ven idly state do conserve tywet , d® loagyr It will take fbr a® Aid memory, drive y Into ar ware that Is an that Idle state to retorn to an actf to processing, diahk

f OCA d I Motahl , it x s en visione tkai not all processing cores to II esnibti egth v aleht powe savings and laieoyies when operating ¾t a giv en temperature and in a g.i ven Idle stats, Ag one of drolnoto aklll In the art will reeogniae, performance charaeteriptiya of various processing; r ores when In the sao-e idle stare and .,u. the same operating tympefainre ag duier da any number of masons ekidibg, dtd net limited to, diftorifti lewis otbedeen, desig vwisPons. etc Moreover, one of ordinary skill in the art toi l recognlto that tde pesibonaneo eharoeieflsoes associated with any given processing «ore mag vary In relation with- tde operating tom peralnry of that processing core, the gtr er snpplied to that processing co ponent according to ike idle state etc. And so, it is eevtoiorsed that erobedipteoto rtf the soktdoti mag acloet anti nnplenten t an idle state tor a given AF in view of¾| acdtojOTC oo temperature and; latency characteristics, f bOdd Fo instance, consider an: romnipl ary deterogeneons totihi~ersse appli eatiorr processor which sna Include a manher ;of dibbiedt processing cores genemtly tanging: in pertor soce capacities ¾onr low to high onnably, one esf ordinary skill In: tde art will rceoggl sc tdat an eaegrplaty hetorogeneoos gtold-ptocessor syste on a chip (fS C'd winch mag include a number of diftoreut proeestow: com onents, eay!vcontahnog one or orore cores, mag also he considered) As wet d fee tmderatood dg one of ordinary shill Ip the an _* a low capacity to roedkan capacity grooessiogsew wlddo the

betsrogeoeOos: AF will exhibit a lower power leakage rate in a gi ven idle state, and eonsegocor!g a lower rate Of power coosompooo and thermal energy generation, than a pfooesslng com dating a relatively high gertormsoee capacity and in the satgy Idle state. For these reasony one of ordinary skill m the art will ryoognito tbak even though ¾ high capacity Cere may he: the most desirable ibr processing a given hoot scqnence for a page, a low capacity core may he more desirable In certain scenario tor dcsljp alien to a WFi Idle state as its iosvet leshdge rite may not cabse an ovemll power budget; to he esCeedcd,

[OOddi Embodi ents of tke solgtron realise power savings i a SoC hg nanskioniug an appkedboa processor anchor Its associated SRAM and/or ldRAM memory to ala Idle state, at wunto n mes and dotations of a boot seyutoie Tmositi ning an application processor and/or its SRAM an /or !ORAM memory in and One of n idle process log stats Vi to dur n a boot d unavailable In Standard boot flow known in the art. f¾r example, impriot aft boot sequences an a typleat ScCf w-hers a modern receives a page Item:

aueiwoty that requires so e soil of Workload processing or dehdn,:ihe: modern will com and the AF te hoot and take over processing ofthe page . Use AF mains up an running often cue sum! eg copious amounts of power, ¾» that poiM forwar while sequentially loa ing and authentieating igufdple I ages, one ®¾r the other:

tool? An exenwUny uadihowu ko<n How m this vein hegios with the hoot core of the A k powering on anti inbialiMog: the mandatory peripheral components suc a A hu t not I on sled to, double data s ave ("DDR A meausy, huerual memory C I EM ^' }, pseudo- snovmsl memory ('"PIMEAf’h cMMC. nos-aud C MAM ^)" ) memory, etc Dnee the: peripherals are :u:dt iaed _> the AF starts loading the Images bmm secondary memory storage which includes readmp metadata for each. image and sending It tor secure:

andaorisahog Arne a trusted pope. If a signature vabda¾o«: of the r oeiadMa is

soeeessiub le, the m tadata ϊy sueeessfet!y validated via decryption. arsing a ptedettued key,, the AF begins reading segments of aa Image, pissnag each to the trusted sooe ? tote-pity checks fte AF works with; a crypto eoqitre to calculate a hash an ve ity the I ntegf ity with tire met aekna before mo bug th trusted I m age ieto OR AM !fotah I y , the nodi dona 1 hoot slow requires that the Ah and the DRAAl, he powered couthutously and nhmmally or never eownng m Idle state rmid I atagu validation Is complete,

jOOOj As Will become better understood Irom rhe hallowi g description and associated figures, esobodmiegts ofthe .solution provide for a erodem -directed: boo:tblow ^: that allows opportunity for the AP attd/os the DR Ai to be powered do t¾ into a» Idl state during strategic points in the novel boot sequence ¾ this way, embodiments of the sohdtoo utay conserve power that would otherwise be consumed by an AF cote end DRAM ex eenhng a traditional boot; flow:.

jOiBif; PICe 1 Is a functional block diagram I Ibtsf rating tm eosbodiment ofan on- chip syste Ί&2 fbr sveeaOnwa modem-directed; application processor hoot flow, the onfohlp system 102 beliti included in a Flip 100 As can he seen In the FKL £ iiSostrsh w a mo e 101 Is in com uhicaboh with a um ewe 57 ; application rocessor 111 _:„ The AF i 11 shown hy the illustration includes four corns 271 A, 27 IB, dv fC, 27 ID, ho ever, it will be understood that an AF 1 11 is not li ited to any specific nu ber of cores 27 i Bach cote «say have assoc! sled with It a tempcralmA sensor 157 for ntonitorlng iherntai: ene:rgy gener foa b the roy motive core, as ntorc spccificai!y described relative to the fit. I. 2 Illustration |004b¾ 11%: application processor 1 11 may $>e perable to com unicate ith a subsyste 20? ifs ueed of reset, re., dm LR I 1 i May iM epembte to eveehteaFoot: sequence Ibr tile subsyste 20? The AF 1 1 is also to eououwueaoun with a Hash ccintrofler and its associated DMA engine f I 4 end crypto engine i M ^" fhe Hash es¾irAtes sssntro!s and anates access in data images stored In cvterua] memory (e,g. a boot image), such as fPsh/NAND memory U 2A tenth or. die AO 11! may also be in comm uni cation with a PRAM memory § i 20, by and Trough a. PRAM controller, as woul ha understood fey on o ordinary sktSt m tbs art ; The DRAM i I2R n t a rowMn an eseawng on aye, as would he understood by one of ordinar skill in the art. As shown in the FIG ! illustration, both the fiash/NA.Nl> memory I I2A and the DRAM memory P 2B <n:e located on a SOC system f olk however, itis envisione that any of the Fiasit/NAND memory t ISA and the DRAM memory I I2S >nayMe loeaied outside of SOG s stem IDS, As wilt become hetter nodefstood Aoot sehAequeut tignres an their telated desedption, the SpC system d? illustrated In FIG; I may bo eenigiued and operable to eseeuted a boot sequ ence tor suhaysSent 2d? using ¾ uMde Mirecte approach: that allows for the AF I I t to transiti n In and out: of a nidi e state, such: a a FI state, as needed

[0041 i Turning now to FIG: 2, illustrate is Muchona! block diagram of an vs emplo . nowAmtilng aspect of a FCP In the loisn of a wireless telephone tor Implementing methods and systems lor modem-directed a pheado t processor hoot flows As shown, the PDA 100 includes an on-chip syste id? that Includes a hewtogeneoits, nruid--core ocotraS processing noli f MRCT) 1 10 and an analog signs! processor 12(1 that are coupled together The CFO I Id May comprise a aeroM: core 222, a l!ssl core 224, and an fellh core :23d m understood by one of ordinary: Mill In the art Further _* instead of a CFli ft A a digital signal processor ("DSFA ma also he entployed as understood fey one of ordinary skill n dm art Motoovcr, as is understood In the aw f heterogeneous :mulhwore processors, each of the corns 222, 224, 230 may process workloads a different maximum voltage l¾¾¾«eft ¾ eabihit different quiescent supply current Fispg 2 leakage rates at given t mpera ures and opesiMng. states, have difterent latenci s fewtransihooiog from a given idle operating state to a active state, etc.

[0042 Itt general, the modes» to t may he responsible tor monitoring page requests requiring action and directing the AF 1 1 1. w inch also m ay fee a heterogeneous mu · core processor, to initiate a boot sequence during svhich it transitions in and out of 4 WFFstaie In order to conserve energy consumption. some emhodlommx, the AP 1 .13 ¾ *tceiv½ ^: ieinperature data Gout ¾ :o to module (nor depleted tit the FIG. 2 ulusnatieuF: as: wed as other e dMi !nd!etnors, arsd use the data to Beta rota te the 1 mpaov o:o latencies and power consumption that ay result: from IransitlorhUg « w toore of Its cores to a dlitsntmt operating _. state during the boot serf pence

i0i¾3| The GPU S 10 oommrmiea res with multiple operational. sensors te g,.

ieotgelolure sensors I S/i and eon onestis d ohu ed ihtoughout the on-chip sy$t&tt 102 of the PCD S OD. such as wilt the mode 101.

05034 J As Hi curl rate la I fU 2. d S sp. ay coo tod kv 121 ami a touch, screen controller 130 are coupled to the CPU I I 0. A toueh _: screen display 02 external to the cs:reldp system 103 i couple to dw di play eontro!ier 128 and the toueh screen control I et 130 PCD 100 ay fu ohcr include a video decoder 134 , e e, , a p ase _” aitmwoiog litre Gfi AIA) decoder, a segoeolial eeu!enr avee memoite (MBClAIvir j decode a oa iooal teleelslou systemis;) committee f ^: NTSC't decoder or any other typeOf video decoder 134. The video decoder 134 Is eoopMl to the moltUeOre oeutral proeesslug unit f "CPU ^' ) 1 10 A video ataptller :13d Is coupled to the video decoder"

134 and the touch screed display 132: A video port I Id is coupled to: the video amplifier 130 As depicted lit f IG, ¾/» universal serial bus fdJlBG controller 140 is coupled to the CP I KK Also, a USB pert 42 I couple to the USB oonh'olfer 144, A memory 12 (on -chin GRAM 1213 apd olUchlp Flash M2AI and a sub sen her identity module (SIM) card 140 may also he coupled to the CPU 1 10 and/or AP I I :l Pur then as shown In FIG 2, a digital carnet» |A8 -may he c upl to the CFO I i in an exemplary aspect, the digital camera I4S is a ehorge-eounied des'lee G ^; €;03 ^:: ) eu eva ore com lementar tnetaP-ox e send conductor ("'C OS''} eamem,

JtKMo j Ax Further illustrated In FIG, 2, a ste n audio CODEC I SO may he coupled to the analog signal pt'oeessor 12 Moreover, anoodl© amplifier 132 may he coupled to the stereo audio CODEC 142. In m exemplary aspect, a Iksf stereo speaker 154 and a second stereo speaker I Ah a e eoupled to the audio amplifier 182. FIG, 2 shows that a microphone amplifie i shsnsy he: also coupled to the stereo audio CODEC ISO, Additionally, a micro hone 160 may he coupled to the microphone amplifier I AS, In a: particular aspect a Tregueney Odulalion f'FIVfB radio tuner 162 may he coupled rd the stereo audio CODEC I SCI Also, art EM ametma 64 k coupled to the FM radio tuner 162 Fmtbeg stereo headphones 1 6 may he coupled to the stereo audio CODEC 150,

S 3- |0O46 ^: ] FIG, 2 further indicates that a ra io licgtmuey RFl transceiver 162 may fee cotspleb to she analog signal processor 226 An AI switch 170 otay he coupled: ΐό the W transceiver 26 an an RF antenna 172: As shown FIG 2;. a keypad 174 may %« coupled to dre analog si gnal preseessor 226. A so, a m ono headset with a microphone 176 otay he coupled to the analog: signal processor 126 Fmthec: a vibrator devlep lFS otay he coupled: to the analog, ignal processor 126. FKI, 2 also sho s that a power supply I PH, or example a hattery, is coupled to tlw oa,--dhp: systeto 102 via a power nianagement integrated clreoit f Fh!IC ^" · .140. la a pyrdcolar aspect, til power supply .1 PS secludes a reehargeahle C battery or DC power supply that is derived hu an al ternating ewrem G 6C t to DC transformer thai Is connected to ah AC power source. d47] The CFC i 0 acre also he coupled to Poe or more haemal , on -chip temperafore sensors 15? A and T57B a well as one or more external olGehtp

iemgerdfore sensors 157C The oofolnp tempemt e sensors ! 57L, 157:11 t«¾y comprise oho or atom pfopotlfoop! to absolute iemgeraitwe GFTATfo teptperaturc sensors that are: based h: vertical FMP structure and are usually dcdleated to eompin estfary raetsi oxide semicoodnetor f ^; AMCISfo very large-scate integration: ( ^Si VCSF) circuits:. The nllfoMp: tnernwi sensors 157C new eo ris one or mom them·! stow The tenipesa uw sensors I S r may produce a voltage drop that la converted: to digital Signals with a r analog WO digital cooveBef r ADC} controller 102 However, other types of w-operamw sensors l¾7 may he employed without departing Ite the scope of die I ttveiUkai

[01)46} The temperature sensors 157, ht addition to doing controlled and monitored by m AD contspl!er icy ay also he controlled and monitored fey one or mom

odem ICI and/or monlfor wmduleisi, The tnodenl 101 and/or monitor triodulo(si may comprise software which Is executed by the CPU 1 16, ilowever, the modem 101 and/or mo t r modal etko ma also he formed Sons hardware and/or firmware without departing Com the scope of die Invention,

{00461 Returning i:o F G, 2, the touch semen display ITS, hw video; pod: TS, the CSS peat 142, the camer 14fo the first stereo speaker XS4, the second stereo speaker 156, the mle opl-ione 66, the FM _: antenna 164, the stereo headphones i e-o, me Rr switch 1: 76, the RF antenna 172, the keypa 174, the mono headse 1 6, the vibrator 1 0, thermal censors 257C, FMIC 126, Flash: ί 12 A, the power suppl 1 Si and the AOG controller 163 are external to the oh-chi system 162 However, it shoul he under Wood that the modem lOI and AF 1 1 ay also recei e one o· mom Indications rv signals iro one or more of ihase external devices by way f dm analog signal processo 126 24 and the CFO I ICHdlikl In e rest: time management of t e Msonrees operable birthe PCD 166

[0050] hr a pmalenlar aspect, one or more of tfeMetbati steps described: herein· trtay be Implemented by esecutahie ioimoehon and parameters siorebJn the memory H2, lb® proce sors S 16, 1 ! 1, 156. the modem 16 F he DM e gine lift and crypto engine 110 («or shown 1» FIG :2), _: the memory controllers and associated. memory 1 12, the siraebaos stored thereby or a eoarbbmfto» thereotdnsy serve a a mesas fo peribr rag one r·· more of th e method step.·:. descri bed beret» .

005 !:| FID. 2 Is a sequence ding; as» ilhsanadng an exemplary embodiment of a cun hod 500 tor rmmc directed application processor boot Hose according to the soiutlom Beginning at actio» 303 , the AF li i, In response to a power on reset commumeat!og from the mode t Oi, inbiallaes DMA. engine 13 and, at action 306, !piiia!iaes crypto engine i 16.. A¾ wooM be understood by one of ordinary skill In the act actions 363, 306 ay occnr essentially slnmilaneonsiy, one after the oSfren in obiter order: That is, action: 3:03: ma im ediately precede action 366 or. ro the Meae ve, acts on 306 sta im ediately precede action 363.

(0052| Whir D A engine 1 14 and crypto engine 1 16 inMaiiaed, the AF 1 1 1 ay tak action 366 and trigger DMA engine 1 14 to rea metadata associate with a particular I a e stored la Flash U SA, In response, he D A engine 1 14 may take action 312 and return an aekt wredgeumot ;e.o.. a non - Pocking aeknowfedge eni) to AF 11.1 Advantageously, the AF 111 (end Its associated memory component DRAM and/or SRAM for ekample) may enter a first WFl state 313 to conserve power eonsomptiao as the D A engine 1 4 reads the metadata:, lire AF 1 i t may rema. ra the i si 1 state 3 13 letth at action 15 It receives a wafceop intesrnpt Rons DMA engine 114 Aoiabi _s reference 1» this description to the AF H I entedgg and/or renmiislng in a H state, or any retentio or power eoiapse state will be nndersfood to mean that, not only the AF 11 1 Is I» the T && hot aloe, In some embodiments, any memory component associated wit the AF 1 1 1 Removing orlowming power&om the rails usee to sopp!y power to the AF i l l and/or Its assoc! apd _: nte ry eo poneel 12 will advantageously conserve power consumption on tbe SoC!,

[60531 In responseld the wakenp Internrpt 3 I S, the AF 1 ! I ma transition out of the WFI state a i hack to an active processing stale to take action 318 and instruct crypto engine 1 16 t ea!entste a hash associa _t ed with the metadata. The crypto engine ! d may c&lcui ate the bash an d return I t to AF 11 1 v i a mi on 321. Use A l id tony 45 tbetr xsildato the hash and signature associated with the metadata (action 324} and then :hh»M:e DMA engine t 14 14 ead « first segment: of data irom the Image (action 4:27): exa DMA mgim 1 1:4 ma respond with weiron 43:0 aeknowledglngthe AP i t F res nest, similar to: previously desedhed action 512. A oa:n:tageoosl _s the AF i It may enter second WPI state 441 to eonseiv powe ttonsmopuoe as the DMA engine 1 M made the first segment of the imag The AP 111 may remain iv; dm W.F ; state 331 until at action 334 it receives a wakeup · oierns.pl Dons DMA engine 444

005-1 i to response to the waknup .interrupt 1.13, the A.P ! 11 may was Ah on ou of the WFl stave and hack to an active processing state to ake ac on 330 and instruct crypto engine 1 i 6 k· calculate the hash Tor the iua< data segmeot of the ike age. 1Acn the AP 1 i 1 may take motion 339 am! initiate the DMA engine 1 14 (ohogm its teed of a nextdaia segment of the inmge The DMA engine 1.44 may respond ti¾ ached 443 acknowledging the request to read the next data segment (shown fl© 3 bhrstrailito as action 342 AT Notably, the AP 11 1 makes its inAractions to (aeiion 5301, and receives its npiohiocking: aeknawlcdgcmeni itotp (action 442T the DMA engine 41:4 while crypto engine 1 M is calculating a hash faecottlm to a hash .hntedoe, as would he understood by one of ordinary skill in the art) .m response to previous action 444 front LR 1 ! I

10031] At action 445, Ac oryplo engine i id ha compl ted its has calculation and returns it to the AP I i I at action 345, similar to previous ecu on 421 The AP i 1 1 may then validate the hash and signature associated with the root segment of tbe rmage (action 343) Nexp hcearwo dte AF 1:1 :S had previously received the coo-htocklgg aeknowtedgerneni fro DMA engine 1 14 at action 442,: the AP i t 1: may transition to a next WF! slate 334 an await a wakenp iMemtpttoa end next data segment rea at action 354 from DMA engine 1 14 (show w F!Cf 3 ilostmtton as action M2B3 A ter action 554, the AP ]. I 1 again transitions mi _: of IFF! slate and into an active processin state. The sequence returns to action 446 and continues to loop through actions 530— 33 (loop designated in FI© 3 as 3574 authettli eating data segments of die Image, _: nthil an iteration d aehoo 3 5 Is associaicd with a sncccsstol aothcoOc lcn of a last data segnnun of the image

[003d Once a last data segment of the image has been successfully authenticated at an Iteration of action 54S, the entire Image has keen read and authenticated and the AP 11 1 takes action 366 and brings sub ay Ste : 407 out of reset Advantageously, throughout the boot sequenee 400, the A:P 1 i 1 peri edi call y transitioned I o and out of a WPl dle thde, thereby avokhng oftneeessaM power consumption while ItwiDMA engine i 14 and/or A pto ghit 1 Id owee sed workloads

[005?! FI 4 Is « secfiwnee dlagcanr illustrating another eyemihatY embodimen of a method 400 for wodeoudirected application pioeessor boor flow according to the soknion, The exe lary embodiment illustrated by the FTG. 4 sequence 400 Includes add! pood idle eta So opponmbdes lor tbs AP Id 1 over ike acpuence 500

[0058 ! Beginning at action 405, die L.R 1 1 \ , in response to a power on reset coneoehleadosi Doer die mode : 10 ; . nmiabces DMA eOgdM 1 14 an , d sodon: 40b, bddslwes crypto engine Die A would be underwood by one of ordi nary skiti lit the art, actions 403, 400 co recur vsserwalh simultaneously , case alter the other, hr either order: Tha w, action 405 ay immadbiwi precede action 400 op In die ahernadve, action 400 may Immediately -prece e action 403,

fOOSOj W ith DM A engined 1 and ewpto engine ! 15 ini iah cert the AP i t ! may take aetloo 400 nd lclgger D A engine 1 14 to read tggiadsta associated with a partieo!ar i age stored in Flash i IS In response, the DMA engine I S 4 may take action 412 an return a noo-blocking aeknowledgernenr to AP 1 1 1 Advatgageousiy, th AP I t I ossy enter s OtseWFI slate 413 to eonserve power eoasr tpdo;t as the .D A eng we 1 14 reads the metadata The AP i 1 1 ma remain in the drat WFI state 415 nntd at acdoe 415 It; teeelv¾a a-Avakersp inrermpt Twan DMA engine I H.

[0000 : I o response to the makeup I wet top· 4 ! I, the AP i 1 1 m ay wane do cm of the WFI state anti back to an active processing state to take action 41 S an instruct erypto engine S J6 to calculate a hush associated with the metadata. The AP 1 it ma transition hack: to the WFI state Oar a second duration 420 white dm crypto eegiee I W calculates the hash , The crypto engine I i 0 otay ealwdate the hash and send n wakeup mm A pt inedOn 421 ftp AP t S ! hstbre orning the hash to AP Ti l via $im 424

The AP 4 1 1 may then validate dm hash an signature associated with sit metadata [aetlon 427} an then initiate DMA engine 1 14 to mad a first segment of data l:f our the image (action; 43 ^: 0f Neat, DMA engine i 14 may tespood with action 433

aeknow!edD m the AP i t i request:. simitar to previonaty deseri bed action 442, AdvamageoUBly, the AP i t S may enter a third WFI state 434 to conserve power eoMumphon as the DMA engine 1 14 reads the drat segment of the in tape : The AP H i may tomato in the WFI state 434 u,adt at aetlon 430 It receives a: wafceup interrupt Irons DMA engine i 14.

i 7 f OSIj response to lie gReup :kuerrnpt 45b, he AF 1 1 may t ansikod Out of dm Wf 1 sidle and: hack to a» a:ci « ps j sii st te to rak &άύύ 439 ^Uosem r crypto .ettgkfe l lAto ctdoibaieTbe asi f¾r Iks€s.? da» segment o tho image· Tien, km AF I I take action 442 and InilAtc He DMA engine 1 14 to begin Hs rea of a Fast da» segment of lie Image The DM A engine 114 may respond will action 448; ackaow gdgisg the reques U; read she next am seguKxg. The AF 114 may then enter a nest Idle slat® 45if while th¾ (>84 L ca ing I I 4 werksid ad lie m daia segtnent and dm cry to engine 1 16 cafcvkues dm Mek aecoikln lo giee ya aei a 439. The AF S; 1 1 m y e ain idle stale ISO until it receives a Acaken interrupt Irons either or DMA engine 1 14 or aigpid engine I S A. In dm FIS. 4 Sl!nmnoSon _. dm AF 1 1 1 transitions out gfWFf state 459 and heel ro an active processing state when it received a makeup interrupt from crypto engine i 15 laenon 431 ) Cry in engine i S § provides die lash iepnesicd arpievtons action 439 via action 434, sital!ar so previous aehon 424 Tke AF 111 may · Ih:·h val Mate the hash and signature associated _: wild the, first segtsteat of dm image fa Sion 453) ,

pO&l] Meat, th seqnenee dOO esseFiialSy Iremrns to WFl state 434 ns th AF 1 1 i transitions hack into a Ff: stale and Await a ivalmilp- Intemiption and t e next data segment tend Mhh DMA engin 1 14. Th sequence 4® centimes: to loop through actions 433: - 432 (loop designated In FIS 4 as 450| atnhcntloadng dala segnienis of dm image mint sit iteration of action 457 is assoc; wed wuk s successful atdlicntieati a of a last data segment of the Image

1:0993 ) Once a las data seg ent of the image lias Icon successfully audmnticatcd at an iieratloii of sets on 437, the andrs; Image gas keen read and ainlent!cided and: the AF I i i tales action 453 and brinfp sutwyslem 207 out of reset Advmtlageeosly, ihroughouf the boot sequence 490, the A I I I pertodle&hy transitioned in and out of a WFildlf sla e, Ikereby avoiding unnecessary power consumption while the DM A engine i 14 and/or the crypto engine 1 i d processed: workloads _:

fFpdd I FIO 5 is a high level functional Aleck diagram Illustrating an eae splary are kitectnre of a sy stem 5:00 lor atwaniageousiy leveraging a device iQQa coulygutod for a nrodemMAected application processor hoot flow Referring to tic FIO 5 illustration, the exemplary embodiments of a portable contpntutg device 109a with 8o€; 192 thatmay leverage a modem -directed application gsOcessor boot Sow an may include remote wisgiesS comnnmicaison, real-time software updates, extended da a storage, etc: and ay be pros; ded wi r variou con figured ons [00S6j .Adva«ttgeotoly _s ,embObimePts of ev ces. 1 dOaW eoniigored: tor

eonontmleaiibn via computer syxterd aucfe di exemplary system 500 depleted jtt FIG 5 ota reside

CQ«X BieRio networks 591 including, but not iinnted to cellular networks, public s itefeefe telephone networks PSTOa), sable networks Wififfbf) bmnd _: IEEE HO ^C bis wireless netwotics, and tbe bueniet da: among other bangs. sO twseo um rtx!e , content updates. _. database quenes, da a transmission:, esc. Other daw that ay be used la co wcnou with a PCD lltO and twcessmle vw Ida hue- net or other networked systeio wld occur to one of ordinar skill ike art

[00661 Tar uiostnOcd computer system 500 ay anhrh;n a remote server 510 boa mav be coupled no the common! eats oe ttetwdrk 50 The coounuoievuon network: 591 may also compose any or all of a wide area network rWA o, a local area network :f dGyhCk die Merited of a oewthluaeou ofother O pes of network;·: It will be understood that The term server 51 Cl may refer to a single server sy stern: or multiple systems or wuhlpte oerveur Tbe server 510 way be coupled to ¾ database (not: shown) configured: to store various wcocds related to. but not limited to, historical data, fihew/n.des algorithms, user pre!erenees, previously alculated data/uploads, trends, etc [006 | When dm server 5 H ⁾ i coupled to the network 5 1 , the server 510 ma conrmuweatt dn tmh the nem od. 591 wnb va iou d f&reni dev ions !bba-ftbat compose tbe‘'Internet ofThiogG itmiodine evc p!aty devme 100a Devic :100a ay run or execute wDs browsing sofevare or htncuouaflty to access and/or communi cafe with and/or $im fof the server 510. Any device 1 OOfv-f that may access tire network 591 either directly Or via a tether to com pi 1 m mor device, may fee a device 1 0 according to the computer sy stem 500.

[0068 j The device ! 0 m as well as other components within system 500 seek as, dot not limited to:, a wireless rooter (not shown:), may be coupled to the network 59 I by voeioos types of edm muni cation links 545 These eomnruni ahon links 545 may comprise ired as well as wifeless daks. The communication links 545 allow a devices 1 OOs-f to establ lib vi rtya! links 5 vO with tbe server 51 b aod/dr each other Wi le ^: a:vfelnal link 500, for ex mple, is depicted between the server 510 and the device 1ό0h _: a actual wired or i eless link 545 may exist between tbe server 510 and the dev lee !OOa, w ich max also function as a‘linfe devlccf‘ as understood b v one of ordinary skill in the err. (OObPj Ike lin 545 may hearsed only to r- -iy data io few server 51:0 0 on· tile hub device iPfla. ;dd _}$ i«de¾ on etnbediment, as 4 mil --di ectional cootsiTunleations channel Ini other device

lO-di _f ^ leyk s saii icadOTS oyer setyeofk 52! ay wrde toob by one of o ina y skill in U e art

10020} s a uonAimitmg application scenario: for cm embodiment of the solution, device !;00a ithin oo pnier s stem S0Q may eompnse a uisHiy metes (ie gas coeter, water mefef, eleeitte meter, etc; > associated with a real deniial hoeseho!d: aati/or a business. 1 be urn by meter lOOa ay expe- lenee long dwvufems oi smmmai processing act; v ns hr winch ata is bang coiketed fey: the meter i · feuti the applies Oons proeessca CAP) 111 of hoc 1P2 (see FIG. 2) is in -a sleep state or otherwise powered down, as prev usly described; The modees (01 within SeC 102, liowevet:, orgy fee continually powered and ponpgored to eoeMsatly 'listen tor" or ntooitot for

imstrueikmsAegoests otlgmabug: iSo the sewer 5 ! 0,

The lest ueuOus/Wdeesty from server 510 may meiode, ibr eaempk, Ijrp: are wo limited to, commands for the mil its meter M¾)a to upload coll octed data from: its sensors (not If!escraiedf Cooshne with whs! feas been previously described above, the modes; O i (see Fife;. 2fof the SoC 102 may wspond fey directing; the AP 1 1 1 to boot- tip me. Aunc-wr } tor the purpose of executing certain instructions According let the solution, the AO 11 i (see FIG. 2) may execute its hoot via leveraging other components within SoG 102 as previously described.

}i>l)?2) In this way, exemplary embodiments of the solution leveraged by devices i00a~f residing within the Internet of Dyings 595 may advantageously keep a higher power eormu nlng fa,b.if nower-bttoiry”) AP I I 1 in agowered down state when not needed. The modem 10! may (hen be used to '’" ak " the A I ! ! (as well ns its associated memor components! -when the ptoeessmg oapaeity of the Ap 1 1 1 A needed Aforeover, the AP 1 1 may tetUss i f isr power savings during its fepot sequence by using, other, less power consuming components on the SoC 102 to distribute the boot wo gload. as p oylimsly described

(iiO731 Certain steps in the processes or preoeax Cows described tu this specification naturall precede others fbr the invention to function as described. However, the invention is not limited to the order of the steps described if such order or sequence does nor alter the fi ebona!lty of the Invention , That is, h is recognked that some steps may performed before, after, or parallel (substantially aimul aneonsiy whit) other steps -without tiepattmg from the scope spirit i&m ihvemiwr. sohie instances, certain steps ma he omitted or tim performed without de astitig teot ilia hwenhob further,

- words- . -fe as Mhetaartef ^' DbotfV'bRwr, eie ate not miondwi to i it the order of tes ers These words are simply used to guide the reader through the deseoptiou of ihe exemplary method.

0074] Additionally, one of ordinary skill progrurnmlng is abm to write co puter code or idomlfV appropriate hardware atuikr el resets to imple ent the disclosed hwendon Phuw. difoenit based Ob the flow charm and associated dessr gkoh ip this specification:, tor example. Therefore, di closure of a paitteoiaf set of program code Instructions os detailed hardwsoe devices Is not covwkkvcd necessary tor an adwyene understm td g: of bow- to ;inake and use the invertiiUo. The Incentive ibnetiooehty of the elnimeti computer huplemen ted: processes Is ex lained in to ore detail the above description and m eopioopdoit with the drawings, which ay I Mr tntie various powers flOWO _:

jY)0?5 In one or ntorc exemplary aspects, the Ihuenons described: may he

Implemented fa hardware, software; Urns ware, or any co bination thereof IT hnptemented irr sohwate, theihaehobs may he stored cm os ttaostoitted as rate or ote instructions or code on sr co guter-t dahie mediu rornpuier-readabls media Include both computer storage media attd communication media incl uding any mediom that ihoihtaies transfer of a computer program Isom one plane to another. A stotago fpedia may be any available: media that stay he accessed hy a conipnter By way ofcyngrpie, and not linn tabor?, stteh computer weadabte medi may horfo so random -access .memory (" RAM w, read-why memor (" ROM A EERROM, CD-ROM or other optical disk storage, nmgswtie disk storage or other magnetic storage devices, or an other modltma that ay he used to ca ry or store deshred prtig cod Its the form of

struetions or data structures and drat ma be accessed by a compnter:

[D07h| Also, any eonoeciipa is properly ter ed a co pUter-readabSe mediu , For example. If the software is transmitted Ro a website, server, or other remote source ri ing a coaxtal: cable, tiber epic cable, Iwwhxi pair; digital subscribe tine f i>xs ,M or wireless technologies snob as Infra e , radio, and mlcrowave, then dm coaxial cable, fibe optic cable, twisted pair, DSL, or wireless teet olpgies such as infrared, radio, antimicrowave are included in the definition of medium;

|t)D77| Disk and disc, us used herein, Ipcltshes compact disc f MD ⁱ i:, laser disc, optical disc, digital versatile disc iMtiVDp, floppy disk and bin -up disc where disks uSsMlly reproduce aia itiagsedeeilg ^ Je di scs segsoduc©: data: ogb cells wild Sssera. Co ¾i:«a:d pfthe above sboe!dai so fed iacludsb «did» tbe seape ef eotapoiee- sesdalde siedla.

{¾0y¾ I The fdmraldioogh s esie aspects dace peea lllastraie aad describedm ^' d tail it wd! be ua praiood ΐ¾ yaricsuasi^sbfuboas aad abe tlooe ay be ade ibardbs bboot degarbag from b>e spgit aadseope of ke preseft iawaboa, as deboed b the fbliowlag elabgg