FIELD OF THE INVENTION

The present invention generally relates, in a first aspect, to a system for performing measurements on a functional device, and more particularly to a system that allows performing local and global measurements in a simple and highly efficient manner.

A second aspect of the present invention relates to a method adapted to use the system of the first aspect.

BACKGROUND OF THE INVENTION

There are systems in the state of the art that comprise the features of the preamble of claim 1 , namely:

- a first measuring apparatus for performing global measurements at a device scale on said functional device, by applying at least one stimulus signal to at least one of a plurality of contacts to be operatively connected to corresponding contacts of said functional device, and measuring corresponding response signals on at least one of said plurality of contacts; and

- a second measuring apparatus for performing local measurements at a nanoscale on said functional device, wherein said second measuring apparatus comprises a scanning probe.

That’s the case of the system disclosed in Q. Wu et al, “Channel-hot-carrier degradation of strained MOSFETs: A device scale and nanoscale combined approach”, J. Vac. Sci. Technol. B, vol. 33, no. 2, art. 022202, 2015, where, with the aim of correlating nanoscale and device scale aging effects, a CAFM was combined with a Semiconductor Parameter Analyzer (SPA) to evaluate the impact of different electrical stresses at different regions along the channel of a MOSFET, with a spatial resolution in the nanometre range. However, in that case, only the impact at the end of the stress could be evaluated, since the metal gate should be removed before the CAFM test (to expose the dielectric material) and only vertical current measurements were allowed. In addition, the sample had to be moved from the wafer-probe station to the CAFM holder.

It is, therefore, necessary to provide an alternative to the state of the art which covers the gaps found therein, by providing a system which allows to perform local and global measurements on a functional device, which do not have the drawbacks of the prior art, which can combine nanoscale and device scale measurements to get complementary information and build a complete picture of the overall phenomena. SUMMARY OF THE INVENTION

To that end, the present invention relates, in a first aspect, to a system for performing measurements on a functional device, wherein the system comprises:

- a first measuring apparatus for performing global measurements at a device scale on said functional device, by applying at least one stimulus signal to at least one of a plurality of contacts to be operatively connected to corresponding contacts of said functional device, and measuring corresponding response signals on at least one of said plurality of contacts; and

- a second measuring apparatus for performing local measurements at a nanoscale on said functional device, wherein said second measuring apparatus comprises a scanning probe.

In contrast to the systems known in the prior art, the system of the present invention comprises, in a characterizing manner:

- a common support for supporting, on a specific region thereof, said functional device while performing both of said global and local measurements; and

- an interconnection arrangement placed, at least in part, on or over said common support, wherein said interconnection arrangement comprises a plurality of connections and said plurality of contacts to be operatively connected to at least some of the contacts of the functional device when the functional device is placed on said specific region, and wherein the interconnection arrangement is operatively connected to said first and second measurement apparatuses, wherein the interconnection arrangement is configured to select the first and second measurement apparatuses, or parts thereof, to operate alternately and/or simultaneously, by providing the same with the necessary connections of said plurality of connections.

The expression “functional device” has been used in the present document to refer to any device which provides an output as a response to given stimulus signals at its plurality of connections, such as an optical device, a magnetic device, an optoelectronic device or an electronic device, for example a transistor. Therefore, the meaning of the terms operatively connected depends on the type of functional device and can refer to an electrical connection and/or an optical connection and/or a magnetic connection.

For an embodiment, the first measuring apparatus is or comprises a semiconductor parameter analyser (SPA), while for other embodiments is or comprises a magnetometer, a CV meter, an oscilloscope, a photodetector, an image sensor, etc., or a combination thereof.

For an embodiment, the second measuring apparatus is configured to operate using the scanning probe and also at least one contact of the above mentioned plurality of contacts, by applying a stimulus signal to at least one of them, and the interconnection arrangement is configured to operatively connect said at least one contact with the second measuring apparatus so that the latter can operate and perform said local measurements.

According to an embodiment, the interconnection arrangement comprises at least one switch unit operatively connected to the plurality of connections, wherein some of said plurality of connections come from the first and second measurement apparatuses, to provide said selection of the first and second measurement apparatuses to operate, alternately and/or simultaneously, by providing the same with the necessary connections of the plurality of connections. Any possible implementations of said at least one switch unit is embraced by the present invention, whether a manual switch unit or an automatic switch unit, a mechanical or an electronic switch unit, etc.

Also, mechanisms other than switch units, or technically not called switch unit (such as selectors), but able to perform the above described functions, i.e. those related to the selection of the first and second measurement apparatuses and necessary connections of the interconnection arrangement, are also embraced by the present invention, for other embodiments,

For a preferred embodiment, the at least one stimulus signal to be applied by the first measuring apparatus is an electrical signal. However, for other embodiments, other kind of stimulus signals can be used, whether alternatively or complementarily to said electrical signal, such as optical, magnetic, or any kind of electromagnetic signal.

Moreover, depending on the embodiment, the at least one stimulus signal to be applied by the first measuring apparatus is a stress signal (i.e. a signal, such as an electric signal, with a magnitude high enough for aging the functional device), a biasing signal, or a combination thereof.

According to an embodiment, the stimulus signal to be applied by the second measuring apparatus is at least one of an electrical signal, an optical signal, and a magnetic signal, or any kind of electromagnetic signal, or a combination thereof.

For an embodiment, the second measurement apparatus comprises a scanning probe microscope.

Different implementations of that embodiment are embraced by the system of the first aspect of the presented invention, including the scanning probe microscope being at least one of a contact or non-contact atomic, magnetic, or optical force microscope, or a scanning tunnelling microscope, or variations thereof.

For one of said implementations, for which the scanning probe microscope is a contact atomic force microscope, the microscope is a conductive atomic force microscopy (CAFM) or a scanning spreading resistance microscopy (SSRM), so that both topography and electrical current can be measured locally, or a scanning capacitance microscopy (SCM) in which both the topography and the capacitance are measured. The local measurements are done through a region of the device exposed to air such as an electrically conductive channel of a transistor.

For another of said implementations, for which the scanning probe microscope is a non-contact atomic force microscope, the microscope is a Kelvin Probe Force Microscope (KPFM), so that both topography and contact potential can be measured locally, or an electrostatic force microscopy (EFM) in which both the topography and electric gradient are measured. The local measurements are done through a region of the device exposed to air, such as an electrically conductive channel of a transistor.

According to an embodiment, the common support is a sample holder of the scanning probe microscope, and at least the above mentioned part of the interconnection arrangement is placed on the common support, particularly provided on an upper face of an, at least electrically, isolating board attached to said sample holder.

For an implementation of said embodiment, two or more of the plurality of connections of the interconnection arrangement are connected to the plurality of contacts, wherein two or more contacts of the plurality of contacts are placed at least in part over the above mentioned specific region and configured and arranged to be placed also over the functional device, when the functional device is placed on said specific region, with a height between 100 - 1000 nm, from the upper face of the isolating board, that is less than the spacing orthogonal distance (usually ranging between 1000 - 20000 nm) between the upper face of the isolating board and the tip of the scanning probe when at a lifted position.

For a variant of said implementation, at least said part of the two or more contacts are inkjet-printed.

For an implementation of said embodiment, at least two of the plurality of contacts of the interconnection arrangement are defined at respective tips of needle probes, and at least two of the connections of the interconnection arrangement are operatively connected to said needle probes, wherein the needle probes are configured to be moved over and operatively connected to at least some of the contacts of the functional device, when the functional device is placed over the above mentioned specific region. Preferably, the needle probes have their movements limited not to physically interfere with the scanning probe.

According to an embodiment, the first and/or second measuring apparatuses are configured to perform at least electrical global and/or local measurements, respectively, 35 on the functional device, which is an at least in part an electron device (such as an electronic device, an optoelectronic device, a magneto-electronic device, etc.), wherein the above mentioned corresponding contacts are electrodes, and the electrical signal is intended to be applied to at least one of said electrodes to electrically bias the at least in part electron device and/or to stress the same.

In a second aspect, the present invention relates to a method for performing measurements on a functional device, wherein the method comprises: a) performing global measurements at a device scale on said functional device, by: a1) applying at least one stimulus signal to at least one of a plurality of contacts of the functional device, and a2) measuring corresponding response signals on at least one of said plurality of contacts; and b) performing local measurements at a nanoscale on the functional device, by using a scanning probe.

In contrast to the methods known in the prior art, the method of the present invention further comprises, in a characterizing manner:

- supporting the functional device on a specific region of a common support while performing both of said global and local measurements; and

- performing said step b) and at least part of said step a) alternately (first step a) and then step b), or vice versa) and/or simultaneously, by selecting and using the necessary connections of a plurality of connections of an interconnection arrangement placed, at least in part, on or over said common support.

For an embodiment, the at least one stimulus signal applied in sub-step a1) is a stress signal, a biasing signal, or a combination thereof.

According to an embodiment, the at least part of step a) mentioned above is substep a1), the method comprising performing sub-step a1) and performing step b) within at most the following 30 seconds after the application of said at least one stimulus signal has ceased or while the at least one stimulus signal is being applied. With this embodiment, the effects that the application of the at least one stimulus signal (for example, a stress signal) in sub-step a1) has at a local level (nanoscale) can be measured.

For another embodiment, the at least part of step a) mentioned above is sub-step a2), the method comprising performing sub-step a2) and performing step b) within at most the following 30 seconds after sub-step a2) has ceased or while sub-step a2) is being performed.

For an embodiment, the method of the second aspect of the present invention comprising performing step a) (both, sub-steps a1) and a2)) and performing step b) within at most the following 30 seconds after the application in a1) of the at least one stimulus signal applied has ceased or while the at least one stimulus signal is being applied.

For an implementation of any of the just above mentioned two embodiments, the method of the second aspect of the present invention comprises performing at least a plurality of consecutive sub-steps a1) for applying different corresponding stimulus signals, and performing a plurality of steps b), each within at most the following 30 seconds after the application of each of said stimulus signals has ceased or while the same is being applied. Generally, at least one of said stimulus signals is a stress signal, so that the aging effects induced by said stress signal can be measured at a local level.

According to an embodiment, the method of the second aspect of the present invention comprises lifting the tip of the scanning probe while at least sub-step a1) is being performed, and lowering the tip of the scanning probe once at least sub-step a1) has finished. This is done in order to avoid undesired potential electrostatic build-ups.

For an embodiment, the method of the second aspect of the present invention further comprises correlating the performed global and local measurements. This allows to correlate nanodevice properties such as impurities, roughness, density of defects, electrical charge, etc., only detectable with nanoscale analysis techniques, with their characteristic electrical curves obtained, for example with a SPA. This correlation is of great importance in ultra-scaled devices (for example, MOSFETs) as well as emerging devices (such as transistors based on 2D materials or organic transistors), in which the number or position of the defects can greatly affect the final properties of the device as well as its lifetime, that is, its reliability.

The method of the second aspect of the present invention comprises using the system of the first aspect to perform the above described global and local measurements, for different embodiments.

For some of those different embodiments, the above described at least one switch unit is a manual switch unit, while for other embodiments is an automatically controlled switch unit. In the latter case, the above mentioned 30 seconds can be reduced drastically, even below 1 second, or preferably even below 1000 ns.

The present invention allows the use of two different measurement techniques using a single assembly, making the change between both much faster, as for both techniques the device to be tested is placed on the same common support. This speed translates into the possibility of carrying out studies or analysis that would not be possible if both techniques were carried out in separate assemblies. The invention presented here allows, for example, as mentioned above, a combined analysis, to obtain a correlation at the device scale and at the nanoscale of electrical effects that may disappear with time. The present invention also provides a cost reduction with respect to the prior art systems, as, indeed, by using the same setup for device scale and nanoscale measurements considerably reduces the cost of the experimental equipment required to combine both types of analysis. Thus, for example, traditional device scale measurements generally require a wafer probe station, which would not be necessary if the AFM assembly is used as the basis for both types of measurements (nanometric and devicescale). For the measurement, it would alternate between the electronics of the AFM (for the nanoscale measurements) and the instrumentation of the measurements at the device scale (SPA, C-V meter, etc.). On the other hand, the ease and speed of changing the type of measurement leads to a reduction in the cost of electrical tests in the event that the system is used in production lines. In addition, the type of information obtained will be more useful than in the case of using measurements only at the device scale, improving decision-making and, consequently, also obtaining a reduction in costs.

The system and method of the present invention allows the connection of different characterization techniques as required. For example, at the device scale, a SPA, pulse generators, etc. could be used, while at the nanoscale conductive AFM (CAFM) to analyse its conductivity, as well as kelvin probe force microscopy (KPFM) to study the variation of the contact potential, or related techniques such as the EFM (Electrostatic Force Microscope), SCM (Scanning Capacitance Microscope) or SSRM (Scanning Spreading Resistance Microscope) could be used. This allows a large number of combinations of measurement techniques to be carried out and more information about the device to be obtained.

As explained above, both for the system and for the method of the present invention, different combinations of global and local measurements can be carried out, including alternate and simultaneous performance of those measurement, for different use cases.

Some examples of those use cases are listed and briefly described below.

• Electrical analysis at the nanoscale immediately after (strictly, after a much shorter time interval than with current techniques) of applying electrical stress to electronic devices. In this case, the use of electrical stress techniques at the device scale with nanoscale characterization tools in the same assembly allows for consecutive measurements over time, in which the times required to change from one to the other are much shorter (immediately one after otherwise) that otherwise would not be possible.

Examples:

1) Electrical analysis (CAFM) immediately after, at the nanoscale, of the effect of an applied stress on electronic devices, such as those called emergent devices. The sequential application of an electrical stress at the device scale (for example, with a SPA) and the immediate measurement of its impact on conductivity at the nanoscale (with CAFM), allows studying the effect of said stress on transistors, for example, based on 2D materials or organic materials that have the channel exposed to air. The fact of not having to change the assembly between one measurement and the other allows to avoid relaxation problems associated with the passage of time (intrinsic to the phenomenon under study), which could not be measured if it were not with the proposed assembly. This would make it possible to evaluate, for example, the impact of BTI (Bias Temperature Instability), at much lower relaxation times, on the nanometric properties of the device.

2) Electrical analysis (KPFM) immediately after, at the nanoscale, of the effect of an applied stress on electronic devices, such as those called ultrascaled or emergent devices.

As in the previous case, an electrical stress is applied sequentially at the device scale and the contact potential of the device is measured at the nanoscale using KPFM. This allows studying the effect of stress on nanodevices and observing where these defects are generated. Another point of interest is that it is not necessary to modify the nanodevice or have any element exposed to make the KPFM measurement, facilitating the measurement, as well as increasing the typology of possible nanodevices to be measured.

• Simultaneous measurements of the electrical properties at the device scale and at the nanoscale of electronic devices, such as emerging devices. The use of device scale measurement techniques with nanoscale tools in the same setup allows simultaneous measurements that would not be possible otherwise.

Examples:

1) Using a SPA or a pulse generator, a FET based, for example on emerging materials, can be polarized/stressed and, simultaneously, the electrical properties of the conductive channel can be analysed at the nanoscale using, for example, a KPFM or SCM, which gives information about the contact potential or capacity of the material and, consequently, the intrinsic properties of the channel material, such as its work function or density of trapped charge. This configuration would also allow to evaluate the electrical properties of the material under different polarizations (for example, evaluating the potential along the channel, with nanometric resolution), during and after the application of different electrical stresses or during the application of a pulsed stress.

2) Capacitance measurements: using a C-V analyser at a device scale and an AFM used in sMIM (Scanning Microwave Impedance Spectroscopy) mode for nanoscale measurements. By means of this arrangement, the capacitance, for example, of dielectric systems such as resistive memories could be analysed and correlated with the variations in capacity at the nanoscale.

• Repeated analysis of a certain area of the material under study after the application of various electrical stresses. The possibility of alternating device scale measurements with nanoscale measurements in the same setup and, therefore, without having to move the sample (or the scanning probe) between these measurements, allows the temporal evolution of electrical properties of a certain area of the material to be analysed after the application of different tests/electrical stresses. To do this, after each test/electrical stress, it would simply be necessary to lower the scanning probe tip (whose position has not changed between tests/stresses) to come into contact again with the sample in the same area of interest prior to said test/stress.

• Statistical analysis of many devices. The combination of device scale and nanoscale measurements within the same setup considerably reduces measurement time and therefore allows a higher number of devices to be analysed, allowing statistical analysis of the phenomenology to be studied. This would be very difficult to do with two different mounts, as the time required to switch from one mount to the other would prevent many devices from being scanned.

BRIEF DESCRIPTION OF THE FIGURES

In the following some preferred embodiments of the invention will be described with reference to the enclosed figures. They are provided only for illustration purposes without however limiting the scope of the invention.

Figure 1 schematically shows the system of the first aspect of the present invention, for an embodiment for which the functional device is a three-terminal transistor with its conduction channel exposed to air, such as a back-gate graphene-based transistor (GFET).

Figure 2 schematically shows part of the system shown in Figure 1 , for a specific arrangement of a switch unit including several switch units, for an embodiment.

Figure 3 schematically shows the same elements as in Figure 2, but for a switch uniting position of the switch unit of the switch uniting unit for which the first measuring apparatus is connected to the three electrodes of the functional device, to perform only global measurements.

Figure 4 differs from Figure 3 in that in this case the switch uniting unit connects the second measuring apparatus with one of the electrodes of the functional device, to perform only local measurements while or after applying a stimulus signal to that electrode, particularly lateral nanoscale measurement, as the electrode is in this case a drain or a source electrode.

Figure 5 also schematically shows the same elements as in Figures 2, 3 and 4, but in this case the switch uniting unit connects the second measuring apparatus with a gate electrode of the functional device, to perform local measurements while or after applying a stimulus signal to that gate electrode, and also connects the first measuring apparatus to the other two electrodes, to perform also global measurements.

Figure 6 is a schematic top view of part of the system of the first aspect of the present invention, particularly of the common support and part of the interconnection arrangement placed thereon, for an embodiment.

Figure 7 is a schematic top view of part of the system of the first aspect of the present invention, particularly of the common support and part of the interconnection arrangement placed over the common support, for another embodiment.

Figure 8 is a schematic side view of part of the system of the first aspect of the present invention, for the same embodiment as Figure 7.

Figure 9 schematically shows part of the system of the present invention, particularly first and second measuring apparatuses and a switch unit to selectively and operatively connect the apparatuses to four respective connections, such as those illustrated in Figures 7 and 8.

Figure 10 schematically represents some steps of the method of the second aspect of the present invention, for an embodiment.

Figure 11 show friction (a, c) and corresponding current images (b, d) of a zone of a conductive channel near the source of a GFET obtained from local measurements performed with the system and method of the present invention, for an embodiment, (a) and (b) correspond to the fresh GFET (i.e. when no stress signal has yet been applied), meanwhile (c) and (d) correspond to the same zone after an 8h electrical stress. In (a) a hole and a grain boundary (GB) of the graphene layer are highlighted.

Figure 12 is a plot showing ID-VD curves (VG=0V) obtained from global measurements performed in a GFET with the system and method of the present invention, for an embodiment, before and after HCI (Hot Carrier Injection) stress, for two different stress times. The measured resistivities are indicated in the label.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the present section some working embodiments of the present invention will be described with reference to the Figures. For the illustrated embodiments, the terms operatively connected mean at least electrically connected, as they are applied to electronic functional devices D, although the illustrated embodiments could be modified so that those terms would mean, additionally or complementarily, optically connected and/or a magnetically connected, for other types of functional devices.

As shown schematically in Figure 1 , the system of the present invention comprises:

- a first measuring apparatus M1 , such as a SPA, for performing global measurements at a device scale on a functional device D, in this case a GFET with its conductive channel exposed to air, by applying at least one stimulus signal, such as a voltage signal, to at least one of a plurality of contacts T1 , T2, T3 to be operatively connected to corresponding contacts E1 , E2, E3 of the functional device D, and measuring corresponding response signals on at least one of the plurality of contacts T 1 , T2, T3;

- a second measuring apparatus M2, such as a CAFM or KPFM, that comprises a scanning probe P and is configured to perform local measurements at a nanoscale on the functional device D;

- a common support H for supporting, on a specific region thereof, the functional device D while performing both of the global and local measurements; and

- an interconnection arrangement that comprises a plurality of connections C1-C7 and the plurality of contacts T1 , T2, T3 to be operatively connected to some or all of the contacts E1 , E2, E3 of the functional device D when the functional device D is placed on the specific region of the common support H.

As shown in Figure 1 , the interconnection arrangement comprises a switch unit SW operatively connected to the first M1 and second M2 measurement apparatuses and to the plurality of connections C1-C7, and configured to select the first M1 and second M2 measurement apparatuses, or parts thereof, to operate alternately and/or simultaneously, by providing the same with the necessary connections of the plurality of connections CIGS.

Specifically, for the embodiment of Figures 1-5, the switch unit SW is connected, on one hand, to the first measuring apparatus M1 through connections C4, C5 and C6, and to the second measuring apparatus M2 through connection C7, and on the other hand to terminals T1 , T2 and T3 of the functional device D through connections C1 , C2 and C3. For the illustrated embodiment, for which the functional device D is a GFET, terminals T1 , T2 and T3 are connected to the source contact E1 , drain contact E2 and back-gate contact E3 of GFET D. In Figures 2 to 5 different switching states of switch unit SW are shown, corresponding to different possible interconnection modes, which will be described below. Specifically, in Figure 2, the switch unit SW shows a full open state, where none connection is connected to another one.

In Figure 3, the switch unit SW connects connections C1-C3 to the first measurement apparatus M1 through connections C4-C6, i.e. source E1 , drain E2 and back-gate E3 contacts, so that M1 can perform global measurements on the GFET, to acquire its electrical characteristic curves.

In Figure 4, the switch unit SW connects connection C1 , i.e. source contact E1 , to the second measurement apparatus M2 through connection C7, so that M2 can perform local measurements to characterize at the nanoscale the GFET channel, by, in case M2 is a CAFM, applying a stimulus signal, such as a voltage signal, to the source contact E1 of the GFET, connecting to ground the tip of the scanning probe P, thus acting as a drain electrode, and scanning the same along the GFET channel, to obtain the nanoscale measurement of the lateral current flowing between the source terminal E1 and the tip of the scanning probe P.

In Figure 5, the switch unit SW connects connections C1-C2 to the first measurement apparatus M1 through connections C4-C5, i.e. source E1 and drain E2, to perform global measurements, while connection C3 is connected (connection represented by a dashed line) to the second measurement apparatus M2 through connection C7, i.e. back-gate contact E3, so that, in case M is a KPFM, the back-gate connection can be used as a reference to perform local measurements of any or all of the different layers forming the transistor.

For the embodiments of Figures 1 to 6, part of the interconnection arrangement is placed on the common support H, such as an AFM sample holder, particularly contacts TITS and at least portions of connections C1-C3 operatively connected thereto, the latter, at least for the embodiment of Figure 6, in the form of electrically conductive tracks of a printed circuit board B attached to the common support H.

For a prototype made by the present inventors, the printed circuit board B has been made as a custom-made inkjet-printed circuit board where the electrically conductive tracks and contacts have been printed on an upper face of an auto adhesive polyimide strip (Kapton, 50 .m thick) using a conductive ink, and then the lower face of the auto adhesive polyimide strip was adhered on the AFM holder H.

At least for the embodiments of Figures 1-5 contacts T 1 and T2 are placed in part 35 over the functional device D, for example by ink-jet printing a conductive ink defining contacts T1 and T2 over contacts E1 and E2, preferably with a height between 100-1000 nm, from the upper face of the printed circuit board B, that is less than the spacing orthogonal distance between the upper face of the printed circuit board B and the tip of the scanning probe P when at a lifted position, while contact T3 (not shown in Figure 6) is placed under the functional device D, to make contact with contact E3, in this case with the back-gate contact of the GFET. For an embodiment, contact T3 is also provided by means of ink-jet printing a conductive ink.

In contrast to the embodiment of Figures 1 to 5, for the embodiment of Figure 6, the functional device D includes several transistors with a common source contact and a common back-gate contact, and there are several connections C2 connected to respective connections T2. These are intended to be connected to respective individual drain contacts E2 (not shown) of the transistors, to be selectively connected to the measuring apparatus of interest, generally M1 , by means of a corresponding selector (not shown) internal or external to the switch unit SW, selectively connecting one of the connections C2 to a connection C5 (not shown) of M1 .

In this case, the right end of connection C4 would be connected to M1 , while connection C1 (i.e. that connected to the contact T1 connected to the source contact) would be selectively connected to connection C7 of M2 or to the left end of connection C4, i.e. the source terminal would be selectively connected to M2 or to M1 , by means of the switch unit SW (not shown).

Interconnections other than those explained in the above paragraphs could be made with the system shown in Figure 6, with the appropriate switch unit SW, such as those resulting from selectively connecting the drain contact to connection C7 of M2 (similarly as in Figure 5).

Although not shown in Figures 1 to 6, the switch unit SWcan be implemented also on the common support H, such as on the printed circuit board B, or external thereto.

Figures 7 and 8 show another embodiment of the system of the first aspect of the present invention, for which the system is configured to perform measurements on a four- terminal functional device D, such as a four-terminal transistor, for example a top-gate graphene-based transistor (GFET), although it could also be used to perform measurements on a functional device having less than four terminals.

In this case, the interconnection arrangement is not placed on but over the common support H, such as an AFM sample holder, particularly over an upper face of an isolating board (not shown) attached to the sample holder H, which is supported on an AFM motor M2m. An AFM head M2h supporting the scanning probe P is also illustrated in Figures 7 and 8. Specifically, contacts T1 , T2, T3, Tb are defined at respective tips of moving needle probes N1 , N2, N3, Nb, and connections C1 , C2, C3, Cb are electrically connected to the needle probes N1 , N2, N3, Nb.

The needle probes N1 , N2, N3, Nb are configured to be moved over the contacts (not shown) of the functional device D, and contact and thus electrically connect its tips T1 , T2, T3, Tb therewith. The motion of the needled probes N1 , N2, N3, Nb is provided by corresponding micro-manipulators Mm, manually or automatically controlled.

This embodiment can be used to perform measurements on a top-gate GFET, although in this case as the conductive channel is covered by the top-gate, for the local measurements a non-contact measurement apparatus M2, such as a KPFM, should be used, using the bulk connection as a reference to perform local measurements of any or all of the different layers forming the transistor D.

Figure 9 shows a possible implementation of the switch unit SWto be used for the embodiment of Figures 7 and 8. In this case, the switch unit SW includes a group of switches SW1 for interconnecting connections C1 , C2, C3, Cb with M1 , through connections C4, C5, C6, C8, and a selector SW2 for selectively interconnecting any of the connections C1 , C2, C3, Cb with connection C7 of M2.

Hence, for a top-gate GFET D, one or more of the source, drain, top-gate and bulk terminals (not shown) thereof can be connected to M1 , to perform global measurements, while any of those terminals (one at a time) can be connected to M2, to perform local measurements.

The types of connections and contacts of the embodiments of Figures 1 to 6 could be used instead of those of Figures 7-8, and vice versa, and a combination of those connections and contacts could also be used (for example, some connections constituted by tracks of a printed circuit board, and others by needle probes), for non-illustrated embodiments.

Figure 10 schematically represents some steps of the method of the second aspect of the present invention, for an embodiment, by means of a workflow described below, for performing, on a back-gate GFET, global measurements with a SPA and local measurements with a CAFM.

According to the depicted workflow, first, in (I) the fresh device channel (i.e. before any stress signal is applied) is characterized at the nanoscale with M2, i.e. with the CAFM, while applying a voltage Vs to the source terminal (through the connection provided by the switch unit SW), connecting to earth the scanning probe P and displacing the same across the conductive channel, as indicated with a double-arrow line in the Figure. Then, in (II), the tip of the scanning probe P is lifted, and M1 , particularly a SPA, is connected to the source, drain and back-gate terminals of the GFET, by means of the switch unit SW (not shown), and used to apply an electrical stress, and the GFET is electrically characterized at a device scale.

Finally, in (III), the tip of the scanning probe P is lowered to the same position, the switch unit SW connects the source terminal to M2, and the conductive channel of the GFET is again characterized at the nanoscale by M2, i.e. the CAFM, as in (I), but now on a GFET which has already been stressed at (II). (II) and (III) can be repeated as many times as needed, following a measurement-stress-measurement (MSM) scheme. A connection ended in a circle means that it is actually disconnected

Of course, the workflow described above with reference to Figure 10 is just one possible example of how to implement the method of the second aspect of the present invention. Alternative examples could be carried out, different to the one of Figure 10, including, for example, electrical stimulus signals other than stress signals, applying the stimulus/stress signals at a different moment, performing simultaneous global and local measurements, etc.

Finally, some experiments have been carried out by the present inventors for performing measurements on a GFET according to the workflow of Figure 10, particularly related to measurements of the electrical properties of one GFET of a chip including several GFETs, at a device scale and at the nanoscale, before and after device-scale electrical stress.

First, the electrical characteristics (VG=0V) were measured before any electrical stress, using both the SPA and the CAFM, i.e. steps (I) and (II) of Figure 10. To stress the device, at (II), a two cycle MSM scheme was followed, applying 5V DC at the Drain and Gate terminals, while the Source electrode was grounded, during 2h (first stress cycle) and 6h (second stress cycle), being 8h the total accumulated stress time. After each stress cycle, morphology and local conductivity measurements were carried out at (III). An Agilent 5500 AFM was used, which was connected to a Resiscope Module (CSI Instruments), to measure currents in a higher dynamic range (from pA to mA) comparedo standard CAFMs. The used tip of the scanning probe P was a bulk Pt tip from Rocky Mountain Nanotechnology. To obtain a clear image of the graphene layer morphological properties, the friction image (instead of the topographical one) was registered, as the contrast in the latter is very low due to the inherent low thickness of the graphene layer. Current maps were measured in contact mode, while the tip scans the surface. While scanning, a voltage of 1V was applied at the source terminal by the CAFM and the grounded Pt tip was acting as a drain electrode, obtaining the nanoscale measurement of the lateral current flowing between the source terminal and the tip. This voltage was selected sufficiently low to obtain a measurable current but without provoking any additional electrical stress on the graphene layer.

It must be emphasized, first, that after a nanoscale measurement, the tip of the scanning probe P was lifted (but not moved in the x-y direction), so that, in the subsequent nanoscale test, the same area could be evaluated. Second, the time needed to change from “CAFM mode” to “SPA mode” (and vice versa) is mostly determined by the switching time of the used switch unit SW. When compared to the traditional method (i.e. when separated setups are used), this time is strongly reduced, since, in the latter case, the sample has to be physically moved from the CAFM holder to the wafer probe station, which certainly takes much longer. Finally, lateral conductivity measurements on fully- developed devices are allowed. a) Device properties before the stress.

The friction and current images of a region close to the source of the GFET, taken on the fresh device (i.e., before electrical stress), are shown in Fig. 11a/b. The friction image (Fig. 11a) shows grain boundaries and holes, which could have been created during the CVD growth and/or graphene transfer process. Similar features are mirrored in the current image (Fig. 11 b). The holes, observed as areas with darker colour in the friction image, are also measured in the current image with currents corresponding to the noise level of the setup. These areas might be related to regions without graphene and, therefore, to areas where the CAFM scanning probe tip is contacting directly the SiC>2 substrate. Grain boundaries are detected in the friction image as lines that form closed cells (the graphene single crystals). Again, in the current image, these Grain Boundaries can also be observed. Their current is lower than that measured on graphene grains, but higher than that measured on holes (SiO2). Figure 12 shows the ID-VD “fresh” curve measured with the SPA, which shows a linear behaviour. The friction/current images in Fig. 11 a/b and the “fresh” curve in Fig. 12 will be considered as the references, to whom those measured after the stress will be compared below. b) Device properties after the stress

Figure 12 also shows the ID-VD curves obtained on the GFET for the different stress times, together with the corresponding calculated resistances (from Ohm’s law). As it can be seen, the changes in the device resistance are small, at least in this device. However, surprisingly, the highest resistance corresponds to the fresh device. This observation could be related to the sintering of the Ag ink during the stress due to Joule heating. This effect would hide the real impact of the first-cycle stress on the absolute values of the current. Therefore, a comparison of the current absolute values before and after the first stress cycle is not meaningful at this moment. Then, sintering of the conductive epoxy of the printing circuit board must be done before any measurement, to avoid this effect on the electrical data. However, after this initial sintering, smaller currents are observed when the stress time is increased from 2 to 8h (curves shown in Fig. 12), as expected.

Regarding the nanoscale graphene properties, Figures 11c and 11d show the friction and current images, respectively, after 8h of accumulated stress time, of the same region next to the Source. The comparison of the friction images taken before and after the stress shows that, after the stress (Fig. 11c), the inhomogeneities have increased, which have been related to defects induced on the graphene layer during the stress. The current image taken after the stress (Fig. 11d) shows larger relative variations which are actually indicative of the stress effect on the conductivity of the graphene layer. Those regions with lower conduction (grain boundaries and holes) have become larger. Note also that the average current after the stress is larger than in the fresh device, in agreement with device-level data. Larger currents than in the fresh device and also after 8h of stress are measured in the current images taken after 2h of stress (not shown), which corroborates the decrease of conductivity with the stress time observed in Fig. 12.

These results, therefore, demonstrate that the stress induces a clear damage of the graphene layer at the nanoscale, which is observed in the GFET conduction at a device scale.

A person skilled in the art could introduce changes and modifications in the embodiments described without departing from the scope of the invention as it is defined in the attached claims.