FIELD OF THE INVENTION

[0001] The present disclosure generally relates to electronic communication methods and systems. More particularly, examples of the disclosure relate to a system and method for synchronizing oscillators using remote digital time transfer.

BACKGROUND OF THE DISCLOSURE

[0002] Electronic communication methods and systems allow synchronisation between electronic devices. For example, radio interferometer arrays require precise and predictable real-time synchronisation of each array element to a common reference, such as a central local oscillator (LO) source.

[0003] Specialized photonics round-trip LO (Local Oscillator) distribution methods are known wherein feedback is provided from a remote station to "steer" the remote clock and keep it phase-locked to the central station LO. However, for a given required clock frequency, as the distance between the stations increases, the phase-locked loop bandwidth drops and unacceptable phase noise of the remote clock ensues. This problem becomes worse as the required clock frequency at the remote station increases.

[0004] Accordingly, a problem exists with respect to precision ultra-low phase noise clock and time transfer across long distances.

[0005] The following prior art is relevant to this description: Carlson, B., Incoherent clocking in coherent radio interferometers, IEEE Electronics Letters, May 2018.

[0006] Any discussion of problems provided in this section has been included in this disclosure solely for the purposes of providing a background for the present invention, and should not be taken as an admission that any or all of the discussion was known at the time the invention was made.

BRIEF DESCRIPTION OF THE DRAWING FIGURES [0007] The subject matter of the present disclosure is particularly pointed out and distinctly claimed in the concluding portion of the specification. A more complete understanding of the present disclosure, however, may best be obtained by referring to the

1 detailed description and claims when considered in connection with the drawing figures, wherein like numerals denote like elements and wherein:

[0008] FIG. 1 illustrates an array of remote stations for coherently sampling an incoming wavefront in accordance with the prior art.

[0009] FIG. 2 illustrates a system for remote digital time transfer, in accordance with exemplary embodiments of the disclosure in greater detail.

[0010] FIG. 3 is a flowchart showing an exemplary method for the system of FIG. 2.

[0011] It will be appreciated that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of illustrated embodiments of the present disclosure.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS [0012] The description of exemplary embodiments of the present disclosure provided below is merely exemplary and is intended for purposes of illustration only; the following description is not intended to limit the scope of the invention disclosed herein. Moreover, recitation of multiple embodiments having stated features is not intended to exclude other embodiments having additional features or other embodiments incorporating different combinations of the stated features.

[0013] As set forth in more detail below, exemplary embodiments of the disclosure relate to incoherent clocking systems and methods that can be used to distribute an ultra- low phase noise clock to a remote station, phase-locked to a clock at a central station, using mostly digital methods, with little or no limitation in physical separation (i.e. distance) between the stations, and with sufficiently low phase noise relative to the central station clock for use, as examples, in heterodyne receivers operating up to 1 THz, and digitizers operating up to 100 GHz.

[0014] In an aspect of this description, there is provided a system for synchronizing at least one remote station with a central station over a duplex real-time link, comprising: a distributed incoherent clocking module for receiving a remote local oscillator signal from at least one remote station and a master local oscillator signal from the central station and in response determining a round-trip phase measurement of temporal delay variability of the duplex real-time link between the remote station and central station, measuring frequency vs. time of the remote local oscillator signal relative to the master oscillator, adjusting the measured frequency vs. time according to the round-trip phase measurement to remove effects of temporal delay variability over the duplex real-time link telemetry, and generating a phase increment signal; a direct digital synthesizer for receiving and phase adjusting the local oscillator signal according to the phase increment signal and in response generating a derived digital domain clock signal that tracks the master local oscillator signal; and a digital to time domain clock converter for converting the derived digital domain clock signal to an ultra-low phase-noise time domain voltage clock signal.

[0015] According to another aspect, there is provided a method of synchronizing at least one remote station with a central station over a duplex real-time link, comprising: transmitting a remote local oscillator signal from the remote station over the duplex real time link; receiving the remote oscillator signal from the duplex real-time link at the central station; measuring frequency vs. time of the remote local oscillator signal relative to a central oscillator signal at the central station; determining a round-trip phase measurement of temporal delay variability of the duplex real-time link between the remote station and central station; adjusting the tracked frequency of the remote local oscillator signal according to the round-trip phase measurement to remove effects of temporal delay variability over the duplex real-time link; low-pass filtering frequency jitter from the tracked frequency on timescales less than lOx the round-trip delay over the link; converting the low- pass filtered tracked frequency vs. time measurements to a periodically calculated and applied phase increment signal; clocking a direct digital synthesizer at remote station with the remote local oscillator signal phase adjusted by the phase increment signal to generate a derived digital domain clock signal; and converting the derived digital domain clock signal to an ultra-low phase-noise time domain voltage clock signal.

[0016] Coherent instruments, such as radio telescopes, require an incoming wavefront to be coherently sampled at each station (e.g. antenna) across an array of size ranging, for example, from hundreds of meters to thousands of kilometers. This requires a clock signal at each station that is phase locked with the clock signals at all other stations. [0017] It is known to provide a phase-locked loop (PLL) between a remote station and central station whereby the central station LO signal transmitted to the remote station is reflected back to the central station where the phase difference between the transmitted and received signals is measured and used to adjust the central station LO to compensate for low frequency variations, while any high frequency variations are removed with a jitter cleaner. However, as the distance between the remote and central stations increases the bandwidth of the PLL drops, leading to a practical maximum distance dependent on the observing frequency (e.g. the Atacama Large Millimeter/submillimeter Array (ALMA), operating at 1 THz, has maximum distance of about 15 km, while the Square Kilometer Array (SKA) mid telescope operating at 15 GHz, has maximum distance of about 80 km.).

[0018] In examples set forth in this disclosure, each remote station may be provided with an independent (free running) LO that is transmitted to the central station. The frequency versus time of the remote station LO may be measured at the central station relative to the central station LO and converted to digital phase increment adjustment values that can be applied to a digital synthesizer at the remote station which, in response, phase adjusts the remote station LO to precisely track the central station LO.

[0019] Turning to FIG. 1, an array of remote stations (100i, IOO2, IOO3,... 100N) is provided for coherently sampling an incoming RF (radio frequency) signal 110 at each station across the array to generate respective sampled signals IFi, IF2, IF3, ... IF _N , as is known in the prior art. The remote stations include antennas and receivers comprising mixers (MIXER 1, MIXER 2) and local oscillators (rLO) functioning as a heterodyne to downsample the RF signal 110 to a manageable intermediate frequency (IFi, IF2, IF3, ... IF _N ). This sampling requires that the local oscillators (rLOi, rLC>2, rLC>3, TLO _N ) at each station be phase locked with the oscillators at all other stations. To that end, a phase-locked loop (PLL) is provided between each remote station and a central station 120 whereby the rLO oscillator signal is compared with an external reference frequency (Ref) from central station 120 and sends an error signal {err) back to the rLO to keep it in phase lock with the reference signal. MIXER 2 compares the rLO oscillator signal to the reference frequency (Ref). Any error in the phase results in an error signal that is fed back to the local oscillator to adjust its frequency to maintain exact frequency tuning. Each remote station lOOi, IOO2, IOO3,... 100N receives the Ref signal from the same source, central station 120, so that all remote stations are locked to the same frequency.

[0020] Within central station 120, the phase difference between the transmitted Ref signal and reflected error signal {err) is measured and used to adjust the central station Ref signal to compensate for low frequency variations while any high frequency variations are removed with a jitter cleaner. However, as discussed above, a drop in bandwidth of the PLL with increasing distance between the remote and central stations leads to a practical maximum distance.

[0021] Turning to FIG. 2, which illustrates an exemplary system for remote digital time transfer, instead of providing a phase-locked loop (PLL) between a remote station 200 and central station 220, as in the prior art, a distributed incoherent clocking module 230 sends phase increment updates (DDS_pinc(t)) to an n-bit precision direct digital synthesizer (DDS) 240 at the remote station 200 which, in response produces an ultra-low phase noise remote clock signal (f _DDS(t)) that is phase-locked to a central local oscillator mLO 280. As discussed below, distributed incoherent clocking module 230 includes a digital frequency tracker 260 at the central station 220, and a telemetry generator and digital round-trip phase calculator 270 at the remote stations 200, connected by a full-duplex wired or wireless link 245 (e.g. wireless or digital fiber optic).

[0022] As shown in FIG. 3, and discussed in greater detail below, a method is provided for generating the ultra-low phase noise clock signal (f _DDS(t)). At 300, a remote local oscillator signal rLO(t) is transmitted from remote station 200 over link 245 and received by frequency tracker 260 of central station 220 at 310. At 320, the frequency of rLO(t) is tracked via frequency tracker 260. At 330, telemetry generator and digital round-trip phase calculator 270 determines a round-trip phase measurement (telemetry + round-trip phase measurements) of the temporal delay variability of the link 245, which is transmitted to central station 220 as a compensating input to the frequency tracker 260. At 340, frequency tracker 260 removes the effect of variable link delay from the measured frequency. In the absence of any phase compensation input at the frequency tracker 260, variation in delay over link 245 modulates the measured frequency, but it is not possible to determine if the modulated frequency is due to a change in frequency of rLO(t) or a delay variation due to the link 245. As an example, if link 245 stretches so that there is a 1 nanosecond delay, if the resulting delay variability is not measured then frequency tracker 260 would detect a decrease in frequency of the extracted signal even though there has been no actual frequency change of rLO(t). Therefore, sending a 1 nanosecond correction (converted to phase at the frequency the frequency tracker 260 is operating at) at 330 will result in frequency tracker 260 being invariant to the 1 nansecond delay change resulting from variation in the length of the fiber 245. [0023] Digital frequency tracker 260 is an all-digital phase/frequency locked loop where an internal DDS-generated frequency (in the mLO 280 clock domain) is adjusted in phase and frequency, as indicated above, to phase and frequency lock onto the clock derived from the received telemetry data (which tracks rLO 250 since Tx telemetry data at the telemetry generator and digital round-trip phase calculator 270 is clocked by rLO 250). [0024] At 350, any high frequency phase jitter on timescales less than lOx the round- trip signal travel time between the remote station 200 and central station 220 is removed from the phase adjusted tracked frequency via a low-pass filter (LPFF) 290. Therefore, at 340, frequency tracker 260 removes the effect of variable link delay from the measured frequency on timescales > ~10x the round-trip delay, and that are within the passband of the LPFF 290. [0025] At 360, the filtered frequency vs. time measurement is converted to a periodically calculated and applied phase increment signal DDS_pinc(t).

[0026] At 370, DDS 240 is clocked at a frequency that is phase locked to rLO(t) but adjusted in frequency by the phase increment signal DDS_pinc(t), such that the output frequency of DDS 240 (f_DDS) precisely tracks the master local oscillator signal mLO 280.. Clocking of direct digital synthesizer (DDS) 240 by rLO 250 may be done by a direct connection, so as to not introduce undue phase wander of the derived clock cp_DDS(t) compared to rLO 250.

[0027] Then, at 380 a digital to time domain clock converter 295 converts the derived digital domain clock signal f _DDS(t) to an ultra-low phase-noise time domain voltage clock signal (i.e. an output jitter-cleaned clock locked to mLO with rLO phase noise over Tau_c uncertainty).

[0028] The local oscillator signal from rLO 250 must exhibit no appreciable phase change over a duration of time > ~10 times the round-trip delay, which is the round-trip signal travel time between the remote station 200 and the central station 220, plus the delay through LPFF 290 which, as discussed below, is typically the dominant delay. In particular, the rLO 250 must exhibit insignificant high-frequency jitter on time scales Tau < (lOx the round trip delay + the LPFF 290 delay) since such is neither measured or corrected by the phase increment "pine" updates. For example, for a 100 km fiber link, with signal propagation at 2/3c, lOxthe round-trip delay is ~10 msec, for a LPFF 290 that filters out jitter on timescales <= this 10 msec (i.e. fc~=l/4*0.01 sec = 25 Hz) typically has a delay of ~3/fc or 120 msec. Thus, rLO 250 jitter on timescales Tau <130 msec must not be significant. [0029] In embodiments, the phase error measured by the frequency tracker 260, after the LPFF 290, can be measured down to 10 ⁶ to 10 ⁷ cycles RMS (or even lower) at a "tracer" frequency (digitally derived from the received rLO 250 data clock) of 10 MFIz or higher with no bias (i.e. no drift) between the measured frequency and rLO 250, which is suficient to determine the required DDS_pinc(t) update values to ensure that the DDS 240 output cp_DDS(t) is phase-locked to mLO 280.

[0030] Since f_rLO(t), the frequency at which DDS 240 is clocked, is known (i.e. measured) as well as the resolution nb_DDS of DDS 240, (i.e. the number of bits of DDS 240), pine can be solved for a desired cp_DDS (t) and output frequency, f_DDS(t) = d(cp_DDS (t))/dt, as follows: f_DDS = DDS _pinc( t)/2 ^nb - ^DDS xf_rLO( t).

DDS 240 is driven open-loop (i.e. there is no feedback of cp_DDS (t) to the central station 220), thus there is no remote-to-central station distance limitation due to any such feedback. [0031] It will be appreciated that nb_DDS for DDS 240 must be sufficiently large and

DDS_pinc(t) must be calculated to have no bias compared to the frequency vs time measurements by digital frequency tracker 260 since DDS 240 operates open-loop. For example, with nb_DDS=64, and f_r_LO = 250 MFIz, DDS 240 has a frequency resolution of 250e6 / 2 ⁶⁴ = ~le-ll FHz, but will have no bias with proper digital unbiased rounding methods employed in DDS_pinc calculations.

[0032] As discussed above, since clock signal cp_DDS(t) that is tracking mLO 280 is in the digital domain, the digital to time domain clock converter 295 converts cp_DDS(t) to an actual ultra-low phase-noise voltage(t) clock waveform that can be used outside of the digital domain, using any of a number of methods, such as digital phase-to-sine wave conversion, then digital-to-analog conversion, followed by a jitter-cleaning circuit..

[0033] In summary, as set forth herein, an ultra-low phase noise remote clock is output from the digital to time domain clock converter 295 that is phase-locked to master local oscillator mLO 280 for use, as an example, in heterodyne receivers up to 1 THz and digitizers up to 100 GHz, with virtually no limitations in the distance between the remote station 200 and the central station 220, the only limitation being the frequency stability of rLO 250, which, as discussed above, must remain stable as previously described as the distance increases. Distributed incoherent clocking module 230 transfers time measurements to the remote station 200 rather than re-sampling digitized data, as in the prior art. Round-trip phase vs. time measurements are performed instead of feedback, to remove effects of any central-to-remote station link instabilities, thereby allowing clock and time transfer over large distances.

[0034] It is contemplated that very long-range ultra-low phase noise time (clock) transfer may be possible over bi-directional fiber or wireless connections in radio telescopes, limited only by the stability of rLO 250.

[0035] The present invention has been described above with reference to a number of exemplary embodiments and examples. It should be appreciated that the particular embodiments shown and described herein are illustrative of the invention and its best mode and are not intended to limit in any way the scope of the invention as set forth in the claims. The features of the various embodiments may stand alone or be combined in any combination. Further, unless otherwise noted, various illustrated steps of a method can be performed sequentially or at the same time, and not necessarily be performed in the order illustrated. It will be recognized that changes and modifications may be made to the exemplary embodiments without departing from the scope of the present invention. These and other changes or modifications are intended to be included within the scope of the present invention, as expressed in the following claims.