Title:
TESTING ADCs
Document Type and Number:
WIPO Patent Application WO/2022/207807
Kind Code:
A9
Abstract:
A circuit portion (1) is provided which is arranged to be operable in a test mode. The circuit portion includes a Successive Approximation Register Analog to Digital Converter, SAR ADC, (6) and an input (12) for a reference signal (100). The SAR ADC is arranged to generate a feedback signal (101) having a duty cycle representing a time taken for the SAR ADC to complete an analogue to digital conversion. The SAR ADC can carry out a comparison of a duty cycle of the reference signal with the duty cycle of the feedback signal, and can generate an output signal comprising a digital representation (13) of the comparison of the reference duty cycle and the feedback duty cycle.
Inventors:
FON HENRIK (NO)
Application Number:
PCT/EP2022/058605
Publication Date:
December 22, 2022
Filing Date:
March 31, 2022
Export Citation:
Assignee:
NORDIC SEMICONDUCTOR ASA (NO)
International Classes:
H03M1/06; H03M1/10; H03M1/12; H03M1/38
Attorney, Agent or Firm:
DEHNS (GB)
Download PDF: