Title:
TERMINAL AND CONNECTION METHOD
Document Type and Number:
WIPO Patent Application WO/2021/171823
Kind Code:
A1
Abstract:
The present invention prevents breakage of joined parts of a semiconductor chip and a substrate in a semiconductor device in which the semiconductor chip is mounted on the substrate. This terminal is disposed between an electrode of an element and an electrode of the substrate on which the element is mounted, and electrically connects the electrode of the element and the electrode of the substrate. The terminal is provided with a plurality of unit lattices and connection parts. The unit lattices provided to the terminal are formed by joining a plurality of beams in a cubic shape. The connection parts provided to the terminal connect unit lattices adjacent to each other among the plurality of unit lattices.
Inventors:
UMEZAWA JO (JP)
LAWRENSON MATTHEW (GB)
ELLIOTT-BOWMAN BERNADETTE (GB)
WRIGHT CHRISTOPHER (GB)
BEARD TIMOTHY (GB)
LAWRENSON MATTHEW (GB)
ELLIOTT-BOWMAN BERNADETTE (GB)
WRIGHT CHRISTOPHER (GB)
BEARD TIMOTHY (GB)
Application Number:
PCT/JP2021/001298
Publication Date:
September 02, 2021
Filing Date:
January 15, 2021
Export Citation:
Assignee:
SONY GROUP CORP (JP)
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L21/60
Foreign References:
| JP2006287091A | 2006-10-19 | |||
| JPH04137630A | 1992-05-12 | |||
| JPH07246492A | 1995-09-26 |
Attorney, Agent or Firm:
MATSUO Kenichiro (JP)
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