TEST DEVICE AND TEST METHOD

WIPO Patent Application WO/2010/086971

A1

Disclosed is a test device comprising a signal output section for outputting a test signal, a signal acquiring section for acquiring a device signal outputted by a device to be tested, and an adjusting section for adjusting the signal output timing at which the signal output section outputs the test signal according to a delay caused by a transmission path for connecting the signal output section, the signal acquiring section, and the device to be tested. The adjusting section includes a rising edge adjusting section for adjusting the signal output timing in the rising edge of the test signal on the basis of the timing at which the signal acquiring section has acquired the rising edge of a reflection signal resulting from the fact that the rising edge of an adjustment test signal outputted from the signal output section is reflected at the end portions of the side of the device to be tested on the transmission path and a falling edge adjusting section for adjusting the signal output timing in the falling edge of the test signal on the basis of the timing at which the signal acquiring section has acquired the falling edge of a reflection signal resulting from the fact that the falling edge of the test signal for adjustment outputted from the signal output section is reflected at the end portions of the side of the device to be tested on the transmission path.

WATANABE KEISUKE (JP)

PCT/JP2009/051370

August 05, 2010

January 28, 2009

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ADVANTEST CORP (JP)
WATANABE KEISUKE (JP)

G01R31/28; G01R35/00

JP2000009801A	2000-01-14
JP2853752B2	1999-02-03
JP2008107188A	2008-05-08
JPH0836037A	1996-02-06
JPS58176560A	1983-10-17

RYUKA, Akihiro et al. (JP)
Akihiro Ryuka (JP)

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