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Title:
THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
Document Type and Number:
WIPO Patent Application WO/2009/136645
Kind Code:
A3
Abstract:
Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.

Inventors:
SATO AYUMU (JP)
HAYASHI RYO (JP)
YABUTA HISATO (JP)
SANO MASAFUMI (JP)
Application Number:
PCT/JP2009/058724
Publication Date:
November 25, 2010
Filing Date:
April 28, 2009
Export Citation:
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Assignee:
CANON KK (JP)
SATO AYUMU (JP)
HAYASHI RYO (JP)
YABUTA HISATO (JP)
SANO MASAFUMI (JP)
International Classes:
H01L29/786
Domestic Patent References:
WO2007119386A12007-10-25
Foreign References:
US20020016028A12002-02-07
US6646287B12003-11-11
JP2007220817A2007-08-30
EP1850386A12007-10-31
Attorney, Agent or Firm:
OKABE, Masao et al. (Fuji Bldg.2-3, Marunouchi 3-chom, Chiyoda-ku Tokyo 05, JP)
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