Title:
THIN-FILM TRANSISTOR, METHOD FOR MANUFACTURING THIN-FILM TRANSISTOR, AND LASER ANNEALING DEVICE
Document Type and Number:
WIPO Patent Application WO/2016/084702
Kind Code:
A1
Abstract:
The present invention is a thin-film transistor provided with a gate electrode 1, a source electrode 3, a drain electrode 4, and a semiconductor layer 2 stacked on a substrate 5, wherein the semiconductor layer 2 is a polysilicon thin film 8, and the crystal grain size of the polysilicon thin film 8 in areas corresponding to the source electrode 3 and the drain electrode 4 is smaller than the crystal grain size of the polysilicon thin film 8 in a channel area 10 between the source electrode 3 and the drain electrode 4.
Inventors:
MIZUMURA MICHINOBU (JP)
HATANAKA MAKOTO (JP)
KIGUCHI TETSUYA (JP)
HATANAKA MAKOTO (JP)
KIGUCHI TETSUYA (JP)
Application Number:
PCT/JP2015/082554
Publication Date:
June 02, 2016
Filing Date:
November 19, 2015
Export Citation:
Assignee:
V TECHNOLOGY CO LTD (JP)
International Classes:
H01L21/336; H01L21/20; H01L29/786
Domestic Patent References:
| WO2013005250A1 | 2013-01-10 |
Foreign References:
| JP2001127302A | 2001-05-11 | |||
| JP2002222957A | 2002-08-09 | |||
| JP2005294851A | 2005-10-20 | |||
| JP2011029411A | 2011-02-10 |
Attorney, Agent or Firm:
OGAWA, Moriaki et al. (JP)
Moriaki Ogawa (JP)
Moriaki Ogawa (JP)
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