Title:
THREE-DIMENSIONAL MEMORY ARRAY, MEMORY, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/060021
Kind Code:
A1
Abstract:
A three-dimensional memory array (31), a memory (300), a forming method for a memory array, and an electronic device, relating to the technical field of semiconductor memories, and mainly used for improving the integration density of storage units (400) and simplifying preparation methods. The memory (300) comprises a substrate (100) and a plurality of storage layers (501, 502, 503); each of the storage layers (501, 502, 503) comprises a first metal layer (50A1) and a second metal layer (50A2) stacked in a direction perpendicular to the substrate (100), and the first metal layer (50A1) and the second metal layer (50A2) are electrically isolated by a dielectric layer (51); and one storage unit (400) of each of the storage layers (501, 502, 503) comprises a transistor (Tr) and a capacitor (C), that is, the transistor (Tr) and the capacitor (C) in the storage unit (400) are integrated in the first metal layer (50A1), the dielectric layer (51), and the second metal layer (50A2) which are stacked. The memory array (31) can further reduce the area of each storage unit (400) while implementing three-dimensional integration, thereby improving the integration density; in addition, no great challenge is presented to the process.
Inventors:
JING WEILIANG (CN)
SUN YING (CN)
HUANG KAILIANG (CN)
WANG ZHENGBO (CN)
LIAO HENG (CN)
SUN YING (CN)
HUANG KAILIANG (CN)
WANG ZHENGBO (CN)
LIAO HENG (CN)
Application Number:
PCT/CN2022/119960
Publication Date:
March 28, 2024
Filing Date:
September 20, 2022
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
H01L21/82
Foreign References:
| CN112331672A | 2021-02-05 | |||
| CN106298679A | 2017-01-04 | |||
| CN110349967A | 2019-10-18 | |||
| CN109863575A | 2019-06-07 | |||
| US20160308042A1 | 2016-10-20 |
Attorney, Agent or Firm:
BEIJING ZBSD PATENT&TRADEMARK AGENT LTD. (CN)
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