Technical Field

[0001] This disclosure relates generally to the field of quantum computing, and more specifically, to tileable arrays of qubits in quantum circuits.

Background

[0002] Quantum computing refers to the field of research related to computation systems that use quantum mechanical phenomena to manipulate data. These quantum mechanical phenomena, such as superposition (in which a quantum variable can simultaneously exist in multiple different states) and entanglement (in which multiple quantum variables have related states irrespective of the distance between them in space or time), do not have analogs in the world of classical computing, and thus cannot be implemented with classical computing devices.

Brief Description of the Drawings

[0003] To provide a more complete understanding of the present disclosure and features and advantages thereof, reference is made to the following description, taken in conjunction with the accompanying figures, wherein like reference numerals represent like parts, in which:

[0004] FIG. 1 provides a schematic illustration of a superconducting quantum circuit, according to some embodiments of the present disclosure.

[0005] FIG. 2A provides a schematic illustration of an exemplary physical layout of a tileable unit cell having individual drive lines which unit cell, when tiled, results in an array of qubits with coupling resonators arranged in rectangles, according to some embodiments of the present disclosure.

[0006] FIG. 2B provides a schematic illustration of an exemplary quantum circuit assembly that includes an array of qubits tiled with a plurality of unit cells shown in FIG. 2A, according to some embodiments of the present disclosure.

[0007] FIG. 3A provides a schematic illustration of an exemplary physical layout of a tileable unit cell having shared drive lines which unit cell, when tiled, results in an array of qubits with coupling resonators arranged in rectangles, according to some embodiments of the present disclosure.

[0008] FIG. 3B provides a schematic illustration of an exemplary quantum circuit assembly that includes an array of qubits tiled with a plurality of unit cells shown in FIG. 3A, according to some embodiments of the present disclosure.

[0009] FIG. 4A provides a schematic illustration of an exemplary physical layout of a tileable unit cell having individual drive lines which unit cell, when tiled, results in an array of qubits with coupling resonators arranged in triangles, according to some embodiments of the present disclosure.

[0010] FIG. 4B provides a schematic illustration of an exemplary quantum circuit assembly that includes an array of qubits tiled with a plurality of unit cells shown in FIG. 4A, according to some embodiments of the present disclosure. [0011] FIG. 5A provides a schematic illustration of an exemplary physical layout of a tileable unit cell having shared drive lines which unit cell, when tiled, results in an array of qubits with coupling resonators arranged in triangles, according to some embodiments of the present disclosure.

[0012] FIG. 5B provides a schematic illustration of an exemplary quantum circuit assembly that includes an array of qubits tiled with a plurality of unit cells shown in FIG. 5A, according to some embodiments of the present disclosure.

[0013] FIG. 6A provides a schematic illustration of an exemplary physical layout of a tileable unit cell which, when tiled, results in an array of qubits with coupling resonators arranged in parallelograms, according to some embodiments of the present disclosure.

[0014] FIG. 6B provides a schematic illustration of an exemplary quantum circuit assembly that includes an array of qubits tiled with a plurality of unit cells shown in FIG. 6A, according to some embodiments of the present disclosure.

[0015] FIG. 7A provides a schematic illustration of an exemplary physical layout of a tileable unit cell which, when tiled, results in an array of qubits with coupling resonators arranged in hexagons, according to some embodiments of the present disclosure.

[0016] FIG. 7B provides a schematic illustration of an exemplary quantum circuit assembly that includes an array of qubits tiled with a plurality of unit cells shown in FIG. 7A, according to some embodiments of the present disclosure.

[0017] FIG. 8 provides a schematic illustration of an exemplary quantum computing device 2000 that may include one or more tileable arrays of qubits as described herein, according to some embodiments of the present disclosure.

Detailed Description

Overview

[0018] As previously described herein, quantum computing, or quantum information processing, refers to the field of research related to computation systems that use quantum-mechanical phenomena to manipulate data. One example of quantum-mechanical phenomena is the principle of quantum superposition, which asserts that any two or more quantum states can be added together, i.e.

superposed, to produce another valid quantum state, and that any quantum state can be represented as a sum of two or more other distinct states. Quantum entanglement is another example of quantum- mechanical phenomena. Entanglement refers to groups of particles being generated or interacting in such a way that the state of one particle becomes intertwined with that of the others. Furthermore, the quantum state of each particle cannot be described independently. Instead, the quantum state is given for the group of entangled particles as a whole. Yet another example of quantum-mechanical phenomena is sometimes described as a "collapse" because it asserts that when we observe (measure) particles, we unavoidably change their properties in that, once observed, the particles cease to be in a state of superposition or entanglement (i.e. by trying to ascertain anything about the particles, we collapse their state).

[0019] Put simply, superposition postulates that a given particle can be simultaneously in two states, entanglement postulates that two particles can be related in that they are able to instantly coordinate their states irrespective of the distance between them in space and time, and collapse postulates that when one observes a particle, one unavoidably changes the state of the particle and its' entanglement with other particles. These unique phenomena make manipulation of data in quantum computers significantly different from that of classical computers (i.e. computers that use phenomena of classical physics). Classical computers encode data into binary values, commonly referred to as bits. At any given time, a bit is always in only one of two states - it is either 0 or 1. Quantum computers use so- called quantum bits, referred to as qubits (both terms "bits" and "qubits" often interchangeably refer to the values that they hold as well as to the actual devices that store the values). Similar to a bit of a classical computer, at any given time, a qubit can be either 0 or 1. However, in contrast to a bit of a classical computer, a qubit can also be 0 and 1 at the same time, which is a result of superposition of quantum states. Entanglement also contributes to the unique nature of qubits in that input data to a quantum processor can be spread out among entangled qubits, allowing manipulation of that data to be spread out as well: providing input data to one qubit results in that data being shared to other qubits with which the first qubit is entangled.

[0020] Compared to well-established and thoroughly researched classical computers, quantum computing is still in its infancy, with the highest number of qubits in a solid-state quantum processor currently being about 10. One of the main challenges resides in protecting qubits from decoherence so that they can stay in their information-holding states long enough to perform the necessary calculations and read out the results. Qubits are often operated at cryogenic temperatures, typically just a few degrees or even just a few millidegrees Kelvin above absolute zero because cryogenic temperatures are thought to help minimize qubit decoherence.

[0021] One challenge with conventional approaches to making quantum circuits is that various elements of such circuits are provided on a wafer without much consideration to the physical layout or to how much space the circuit elements take up on a wafer. While this may be suitable for

implementing just a few qubits, such an approach will face significant challenges with quantum circuits that include larger number of qubits because it is not suitable for large-scale manufacturing of quantum computing devices.

[0022] Embodiments of the present disclosure provide a quantum circuit assembly that includes a substrate and a plurality of substantially identical unit cells disposed on a substrate. Each unit cell includes three or more qubits (i.e. each unit cell is a portion of a quantum circuit), and has a side defined as a "base side." In such an assembly, at least some unit cells are arranged on the substrate so that the base side of each unit cell is aligned along a common straight line, thus creating a row of unit cells defined by the common straight line. Multiple such rows may be provided, each row defined by a different common straight line along which the base sides of the unit cells are aligned. Arranging the qubits in this manner allows providing tileable arrays suitable for large-scale manufacturing.

[0023] The expression "substantially identical unit cells" refers to unit cells which are designed to be identical, e.g. in terms of the physical layout of the components of the cells (e.g. components being qubits, resonators, interconnects, etc.) and, possibly, also in terms of the components having identical characteristics (e.g. qubits having the same frequency), but which may differ slightly due to

manufacturing variations, with the differences being within specifications for manufacturing toleration for such deviations. Furthermore, as used herein, the term "tileable" refers to the ability to put identical portions of a quantum circuit, as defined by identical unit cells, next to one another, i.e. tile the unit cells, in such a manner that these portions of the quantum circuit will still work. In various embodiments, the unit cells may be adjacent to one another (i.e. tiled with no space in between), while, in other embodiments, the unit cells may be arranged next to one another with space in between.

[0024] For the purposes of the present disclosure, the terms such as "upper," "lower," "over," "under," "between," and "on" as used herein refer to a relative position of one material layer or component with respect to other layers or components. For example, one layer disposed over or under another layer may be directly in contact with the other layer or may have one or more intervening layers. Moreover, one layer disposed between two layers may be directly in contact with the two layers or may have one or more intervening layers. In contrast, a first layer "on" a second layer is in direct contact with that second layer. Similarly, unless explicitly stated otherwise, one feature disposed between two features may be in direct contact with the adjacent features or may have one or more intervening layers.

[0025] The phrase "A and/or B" means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and/or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C). The term "between," when used with reference to measurement ranges, is inclusive of the ends of the measurement ranges. As used herein, the notation "A/B/C" means (A), (B), and/or (C).

[0026] The description uses the phrases "in an embodiment" or "in embodiments," which may each refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," and the like, as used with respect to embodiments of the present disclosure, are synonymous. The disclosure may use perspective-based descriptions such as "above," "below," "top," "bottom," and "side"; such descriptions are used to facilitate the discussion and are not intended to restrict the application of disclosed embodiments. The accompanying drawings are not necessarily drawn to scale.

[0027] As used herein, terms indicating what may be considered an idealized behavior, such as e.g. "superconducting" or "lossless", are intended to cover functionality that may not be exactly ideal but is within acceptable margins for a given application. For example, a certain level of loss, either in terms of non-zero electrical resistance or non-zero amount of spurious two-level systems (TLS's) may be acceptable such that the resulting materials and structures may still be referred to by these "idealized" terms. Specific values associated with an acceptable level of loss are expected to change over time as fabrication precision will improve and as fault-tolerant schemes may become more tolerant of higher losses, all of which are within the scope of the present disclosure.

[0028] Furthermore, while the present disclosure may include references to microwave signals, this is done only because current qubits are designed to work with such signals because the energy in the microwave range is higher than thermal excitations at the temperature that qubits are operated at. In addition, techniques for the control and measurement of microwaves are well known. For these reasons, typical frequencies of qubits are in 5-10 gigahertz (GHz) range, in order to be higher than thermal excitations, but low enough for ease of microwave engineering. However, advantageously, because excitation energy of qubits is controlled by the circuit elements, qubits can be designed to have any frequency. Therefore, in general, qubits could be designed to operate with signals in other ranges of electromagnetic spectrum and embodiments of the present disclosure could be modified accordingly. All of these alternative implementations are within the scope of the present disclosure.

[0029] In the following detailed description, reference is made to the accompanying drawings that form a part hereof, and in which is shown, by way of illustration, embodiments that may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense.

[0030] Furthermore, in the following description, various aspects of the illustrative implementations will be described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. However, it will be apparent to those skilled in the art that the present disclosure may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the illustrative implementations. However, it will be apparent to one skilled in the art that the present disclosure may be practiced without the specific details. In other instances, well- known features are omitted or simplified in order not to obscure the illustrative implementations.

[0031] Various operations will be described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the present disclosure. However, the order of description should not be construed to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation. Operations described may be performed in a different order from the described embodiment(s). Various additional operations may be performed, and/or described operations may be omitted in additional embodiments.

Tileable arrays

[0032] As the foregoing illustrates, the ability to manipulate and read out quantum states, making quantum-mechanical phenomena visible and traceable, and the ability to deal with and improve on the fragility of quantum states of qubits present unique challenges not found in classical computers. These challenges explain why so many current efforts of the industry and the academics continue to focus on a search for new and improved physical systems whose functionality could approach that expected of theoretically designed qubits. Physical systems for implementing qubits that have been explored until now include e.g. superconducting qubits, single trapped ion qubits, Silicon (Si) quantum dot qubits, photon polarization qubits, etc.

[0033] Depending on the type of qubits used in a quantum circuit component, individual unit cells of the tileable arrays of qubits described herein may be arranged differently. Because superconducting qubits are particularly promising candidates for building a quantum computer and can particularly benefit from being able to be fabricated using approaches suitable for large-scale manufacturing, embodiments of tileable arrays presented herein are provided for superconducting qubits. However, providing tileable arrays of qubits by arranging qubits into unit cells and arranging unit cells along a common straight line, as described herein, is applicable to quantum circuit components that could include any type of qubits, all of which are within the scope of the present disclosure.

[0034] Superconducting qubits operate based on the Josephson effect, which refers to a macroscopic quantum phenomenon of supercurrent, i.e. a current that, due to zero electrical resistance, flows indefinitely long without any voltage applied, across a device known as a Josephson Junction. A Josephson Junction may include a thin layer of an insulating material, typically referred to as a barrier or a tunnel barrier, sandwiched between two layers of superconductor, and acts as a superconducting tunnel junction. Cooper pairs tunnel across the barrier from one superconducting layer to the other. The electrical characteristics of this tunneling are governed by so-called Josephson relations which provide the basic equations governing the dynamics of the Josephson effect. Josephson Junctions are integral building blocks in superconducting quantum circuits where they form the basis of quantum circuit elements that can approximate functionality of theoretically designed qubits.

[0035] Within superconducting qubit implementations, three classes are typically distinguished: charge qubits, flux qubits, and phase qubits. Transmons, a type of charge qubits with the name being an abbreviation of "transmission line shunted plasma oscillation qubits", are particularly encouraging because they exhibit reduced sensitivity to charge noise. In transmons, Josephson Junctions implemented in combination with capacitors provide the non-linearity necessary for forming an effective two-level quantum state, or qubit. In other classes of superconducting qubits, Josephson Junctions combined with other circuit elements have similar functionality of providing the non-linearity necessary for forming an effective two-level quantum state, or qubit. In other words, when

implemented in combination with various circuit elements (e.g. capacitors in transmons or

superconducting loops in flux qubits), one or more Josephson Junctions allow realizing a quantum circuit element which has uneven spacing between its energy levels resulting in a unique ground and excited state system for the qubit. [0036] FIG. 1 provides a schematic illustration of a superconducting quantum circuit 100, according to some embodiments of the present disclosure. As shown in FIG. 1, an exemplary superconducting quantum circuit 100 includes a plurality of superconducting qubits 102. Each of the superconducting qubits 102 may include one or more Josephson Junctions connected to one or more other circuit elements (not specifically shown in FIG. 1), which, in combination with the Josephson Junction(s), form a non-linear circuit providing a unique two-level quantum state for the qubit. The circuit elements could be e.g. capacitors in transmons or superconducting loops in flux qubits.

[0037] In a transmon, a capacitor is configured to store energy in an electrical field as charges between the plates of the capacitor. Typically, a capacitor is of such a size that capacitive energy is significantly larger than the Josephson energy in a qubit. In some embodiments, a capacitor of a transmon may be implemented as an interdigitated capacitor, a particular shape of capacitor that provides a large capacitance with a small area. However, in various embodiments, other shapes and types of capacitors may be used as well. For example, a capacitor of a transmon could be implemented simply as two parallel plates with vacuum in between.

[0038] In some embodiments, a transmon may include two Josephson Junctions incorporated into a superconducting loop, the Josephson Junctions and the superconducting loop together forming a superconducting quantum interference device (SQUID).

[0039] As also shown in FIG. 1, an exemplary superconducting quantum circuit 100 may include one or more further circuit elements such as one or more flux bias lines 112, microwave lines 114, coupling resonators 116, readout resonators 118, and drive lines 120, in order to provide internal and external control of the qubits 102. The qubits 102 and these further circuit elements are provided on, over, or at least partially embedded in a semiconductor substrate (not specifically shown in FIG. 1). The substrate may include any semiconductor material or materials suitable for realizing quantum circuit components thereon. In one implementation, the substrate may be a crystalline substrate such as, but not limited to a silicon or a sapphire substrate, and may be provided as a wafer or a portion thereof. In other implementations, the substrate may be non-crystalline. In general, any material that provides sufficient advantages (e.g. sufficiently good electrical isolation and/or ability to apply known fabrication and processing techniques) to outweigh the possible disadvantages (e.g. negative effects of spurious two- level systems), and that may serve as a foundation upon which a quantum circuit may be built, falls within the spirit and scope of the present disclosure. Additional examples of substrates to be used as the substrate include silicon-on-insulator (SOI) substrates, lll-V substrates, and quartz substrates.

[0040] Running a current through the flux bias lines 112 (also known as "flux lines" and "flux coil lines"), provided from e.g. wirebonding pads (not specifically shown in FIG. 1), allows tuning (i.e.

changing) the frequency of each of the qubits to which each flux bias line 112 is connected. In general, it operates in the following manner. As a result of running the current in a particular flux bias line 112, magnetic field is created around the line. If such a magnetic field is in sufficient proximity to the qubit 102, e.g. by a portion of the flux bias line 112 being provided next to the qubit 102, the magnetic field couples to the qubit, thereby changing the spacing between the energy levels of the qubit. This, in turn, changes the frequency of the qubit since the frequency is directly related to the spacing between the energy levels via Planck's equation. The Planck's equation is E=hv, where E is the energy (in this case the energy difference between energy levels of a qubit), h is the Planck's constant and v is the frequency (in this case the frequency of the qubit). As this equation illustrates, if E changes, then v changes. Provided there is sufficient multiplexing, different currents can be sent down each of the flux lines allowing for independent tuning of the various qubits.

[0041] Typically, the qubit frequency may be controlled in order to bring the frequency either closer to or further away from another resonant item, for example a coupling resonator such as the coupling resonator 116 shown in FIG. 1 that may connect two or more of the qubits 102 together, as may be desired in a particular setting.

[0042] For example, if it is desirable that two qubits 102 interact, via the coupling resonator 116 connecting these two qubits, then both qubits may need to be tuned to be at nearly the same frequency. One way in which such two qubits could interact is that, if the frequency of a first qubit is tuned very close to the resonant frequency of the coupling resonator 116, the first qubit can, when in the excited state, relax back down to the ground state by emitting a photon (similar to how an excited atom would relax) that would resonate within the coupling resonator 116. If a second qubit is also at this energy (i.e. if the frequency of the second qubit is also tuned very close to the resonant frequency of the coupling resonator 116), then it can absorb the photon emitted from the first qubit, via the coupling resonator 116, and be excited from it's ground state to an excited state. Thus, the two qubits interact in that a state of one qubit is controlled by the state of another qubit. In other scenarios, two qubits could interact via a coupling resonator at specific frequencies, but these three elements do not have to be tuned to be at nearly the same frequency with one another. In general, two or more qubits could be configured to interact with one another by tuning their frequencies to specific values or ranges.

[0043] On the other hand, it may sometimes be desirable that two qubits coupled by a coupling resonator do not interact, i.e. the qubits are independent. In this case, by applying magnetic flux, by means of controlling the current in the appropriate flux bias line 112, to one qubit, it is possible to cause the frequency of the qubit to change enough so that the photon it could emit no longer has the right frequency to resonate on the coupling resonator. If there is nowhere for such a frequency-detuned photon to go, the qubit will be better isolated from its surroundings and will live longer in its current state. Thus, in general, two or more qubits could be configured to avoid or eliminate interactions with one another by tuning their frequencies to specific values or ranges.

[0044] The state(s) of each qubit 102 may be read by way of its corresponding readout resonator 118. As explained below, the qubit 102 induces a resonant frequency in the readout resonator 118. This resonant frequency is then passed to the microwave lines 114 and communicated to wirebonding pads (not specifically shown in FIG. 1).

[0045] To that end, a readout resonator 118 may be provided for each qubit. The readout resonator 118 may be a transmission line that includes a capacitive connection to ground on one side and is either shorted to the ground on the other side (for a quarter wavelength resonator) or has a capacitive connection to ground (for a half wavelength resonator), which results in oscillations within the transmission line (resonance), with the resonant frequency of the oscillations being close to the frequency of the qubit. The readout resonator 118 is coupled to the qubit by being in sufficient proximity to the qubit 102, more specifically in sufficient proximity to the capacitor of the qubit 102, when the qubit is implemented as a transmon, either through capacitive or inductive coupling. Due to a coupling between the readout resonator 118 and the qubit 102, changes in the state of the qubit 102 result in changes of the resonant frequency of the readout resonator 118. In turn, because the readout resonator 118 is in sufficient proximity to the microwave line 114, changes in the resonant frequency of the readout resonator 118 induce changes in the current in the microwave line 114, and that current can be read externally via the wire bonding pads. Therefore, microwave lines 114 are also known as "readout lines."

[0046] The coupling resonator 116 allows coupling different qubits together, e.g. as described above, in order to realize quantum logic gates. The coupling resonator 116 is similar to the readout resonator 118 in that it is a transmission line that includes capacitive connections to ground on both sides (i.e. a half wavelength resonator), which also results in oscillations within the coupling resonator 116. Each side of the coupling resonator 116 is coupled (again, either capacitively or inductively) to a respective qubit by being in sufficient proximity to the qubit, namely in sufficient proximity to the capacitor of the qubit, when the qubit is implemented as a transmon. Because each side of the coupling resonator 116 has coupling with a respective different qubit, the two qubits are coupled together through the coupling resonator 116. In this manner, state of one qubit depends on the state of the other qubit, and the other way around. Thus, coupling resonators may be employed in order to use a state of one qubit to control a state of another qubit.

[0047] In some implementations, the microwave line 114 may be used to not only readout the state of the qubits as described above (i.e. used as a readout line), but also to control the state of the qubits. When a single microwave line is used for this purpose, the line operates in a half-duplex mode where, at some times, it is configured to readout the state of the qubits, and, at other times, it is configured to control the state of the qubits. In other implementations, microwave lines such as the line 114 may be used to only readout the state of the qubits as described above, while separate drive lines such as e.g. drive lines 120 shown in FIG. 1, may be used to control the state of the qubits. In such

implementations, the microwave lines used for readout may be referred to as readout lines (e.g.

readout line 114), while microwave lines used for controlling the state of the qubits may be referred to as drive lines (e.g. drive lines 120). The drive lines 120 may control the state of their respective qubits 102 by providing, using e.g. wirebonding pads not specifically shown in FIG. 1, a microwave pulse at the qubit frequency, which in turn stimulates (i.e. triggers) a transition between the states of the qubit. By varying the length of this pulse, a partial transition can be stimulated, giving a superposition of the states of the qubit.

[0048] Flux bias lines, microwave lines, coupling resonators, readout resonators, and drive lines, such as e.g. those described above, together form interconnects for supporting propagation of microwave signals. Further, any other connections for providing direct electrical interconnection between different quantum circuit elements and components, such as e.g. connections from electrodes of Josephson Junctions to plates of the capacitors or to superconducting loops of SQUIDS, or connections between two ground lines of a particular transmission line for equalizing electrostatic potential on the two ground lines, are also referred to herein as interconnects. Still further, the term "interconnect" may also be used to refer to elements providing electrical interconnections between quantum circuit elements and components and non-quantum circuit elements, which may also be provided in a quantum circuit, as well as to electrical interconnections between various non-quantum circuit elements provided in a quantum circuit. Examples of non-quantum circuit elements which may be provided in a quantum circuit may include various analog and/or digital systems, e.g. analog to digital converters, mixers, multiplexers, amplifiers, etc.

[0049] Coupling resonators and readout resonators may be configured for capacitive coupling to other circuit elements at one or both ends in order to have resonant oscillations, whereas flux bias lines and microwave lines may be similar to conventional microwave transmission lines because there is no resonance in these lines. Each one of these interconnects may be implemented as any suitable architecture of a microwave transmission line, such as e.g. a coplanar waveguide, a stripline, a microstrip line, or an inverted microstrip line. Typical materials to make the interconnects include aluminum (Al), niobium (Nb), niobium nitride (NbN), titanium nitride (TiN), molybdenum rhenium (Mo e), and niobium titanium nitride (NbTiN), all of which are particular types of superconductors. However, in various embodiments, other suitable superconductors and alloys of superconductors may be used as well.

[0050] According to embodiments of the present disclosure, components of quantum circuits, such as e.g. the quantum circuit 100 implementing superconducting qubits, may be organized into what is referred to herein as a "unit cell." A unit cell may be replicated and multiple identical unit cells may then be tiled on a substrate. Providing tileable/repeatable cell structure is helpful for large-scale manufacturing, may promote cell interconnects across neighboring dies, and may help minimizing the number of interconnects for qubits.

[0051] As previously described herein, individual unit cells of the tileable arrays of qubits described herein may be arranged differently, depending on the type of qubits used in a quantum circuit component. FIGs. 2A-7B illustrate some examples of unit cell arrangements for transmon qubits, e.g. for transmon qubits of the superconducting quantum circuit 100 described above. In various embodiments, interconnects of unit cells for which some examples are illustrated in FIGs. 2A-7B could have different shapes and layouts. For example, some interconnects may comprise more curves and turns while other interconnects may comprise less curves and turns, and some interconnects may comprise substantially straight lines. In some embodiments, various interconnects may intersect one another, in such a manner that they don't make an electrical connection, which can be done by using e.g. a bridge, bridging one interconnect over the other. As long as these interconnects operate in accordance with use of these interconnects as known in the art for which some exemplary principles were described herein, quantum circuits with different shapes and layouts of the interconnects than those illustrated in FIGs. 2A-7B are all within the scope of the present disclosure.

[0052] Similar reference numerals in FIGs. 1 and 2A-7B are used to illustrate analogous elements in these figures. Each of the reference numerals 202, 302, 402, 502, 602, and 702 shown in FIGs. 2A-7B refers to a qubit similar to the qubit 102 shown in FIG. 1. Each of the reference numerals 212, 312, 412, 512, 612, and 712 shown in FIGs. 2A-7B refers to a flux bias line similar to the flux bias line 112 shown in FIG. 1. Each of the reference numerals 214, 314, 414, 514, 614, and 714 shown in FIGs. 2A-7B refers to a microwave/readout line similar to the microwave/readout line 114 shown in FIG. 1. Each of the reference numerals 216, 316, 416, 516, 616, and 716 shown in FIGs. 2A-7B refers to a coupling resonator similar to the coupling resonator 116 shown in FIG. 1. Each of the reference numerals 218, 318, 418, 518, 618, and 718 shown in FIGs. 2A-7B refers to a readout resonator similar to the readout resonator 118 shown in FIG. 1. Finally, each of the reference numerals 220, 320, 420, 520, 620, and 720 shown in FIGs. 2A-7B refers to a drive line similar to the drive line 120 shown in FIG. 1. When provided with reference to one of the figures, discussions of these elements are applicable to other figures, unless stated otherwise. Thus, in the interests of brevity, discussions of similar elements are not repeated for each of the figures but, rather, the differences between the figures are described.

[0053] FIG. 2A provides a schematic illustration of an exemplary physical layout of a tileable unit cell 200A having individual drive lines which unit cell, when tiled, results in an array of qubits with coupling resonators arranged in rectangles as shown in FIG. 2B, according to some embodiments of the present disclosure.

[0054] In the exemplary embodiment shown in FIG. 2A, the unit cell 200A may be defined by a simple polygon 230, in this case the simple polygon being a rectangle, where a side 232, shown with a line that is thicker than lines of all other sides of the polygon 230, is defined as a base side of the unit cell. In other embodiments, sides of the polygon 230 other than the side 232 may be defined as base sides.

[0055] As shown in FIG. 2A, the unit cell 200A may include a plurality of qubits 202. Only one qubit 202 is labeled with a reference numeral in FIG. 2A for ease of illustration, but four qubits are indicated the unit cell 200A. In other embodiments, any other number of three or more qubits could be included within the unit cell 200A. In various embodiments, the qubit frequencies of different qubits 202 within a single unit cell may be either the same or different, as needed for a particular design. In various embodiments, even if the qubit frequencies of the different qubits 202 within a single unit cell are the same, the qubit frequencies of qubits in other unit cells may be different. As mentioned above, although qubits 202 shown in FIG. 2A are superconducting qubits, in particular - transmons, as illustrated in FIG. 2A by an interdigitated capacitor shown within the qubit 202, discussions provided herein are applicable, with apparent modifications, to other types of qubits, e.g. quantum dot qubits.

[0056] The unit cell 200A may encompass a plurality of interconnects including one or more of flux bias lines 212, one or more microwave/readout lines 214, one or more coupling resonators 216, one or more of readout resonators 218, and one or more of drive lines 220, the functionality of which is described above with reference to FIG. 1. In the example of FIG. 2A, the one of more flux bias lines 212 are shown as four flux bias lines 212, with one flux bias line per each of the qubits 202, although for the ease of illustration only a single flux bias line 212 is labeled with a reference numeral in FIG. 2A.

Similarly, the one of more microwave/readout lines 214 are shown in the example of FIG. 2A as four microwave/readout lines 214, with one microwave/readout line per each of the qubits 202, although for the ease of illustration only a single microwave/readout line 214 is labeled with a reference numeral in FIG. 2A. The one or more of readout resonators 218 are shown in the example of FIG. 2A as a single readout resonator 218. Finally, the one or more of drive lines 220 are shown in the example of FIG. 2A as four individual drive lines 220, with one drive line per each of the qubits 202, although for the ease of illustration only a single drive line 220 is labeled with a reference numeral in FIG. 2A.

[0057] A plurality of the unit cells 200A and the associated interconnects 212, 214, 216, 218, and 220, as shown in FIG. 2A, may be arranged on a substrate suitable for forming quantum circuits thereon so that at least some of the unit cells are arranged on the substrate so that the base sides 232 of these unit cells are aligned along a common straight line. An example of such an arrangement is shown as an array 200B of an exemplary quantum circuit assembly in FIG. 2B.

[0058] FIG. 2B illustrates three unit cells 200A, labeled as unit cells 200A-1, 200A-2, and 200A-3 arranged with their respective base sides 232 (not specifically shown in FIG. 2B in order to not clutter the drawing) along a common line 240-1. FIG. 2B further illustrates that the array 200B may further include additional rows of unit cells arranged along other common straight lines, labeled as lines 240-2 and 240-3. While the example of FIG. 2B illustrates three unit cells arranged along the common line 240, in other embodiments, any other number of two or more unit cells 200A could be arranged along any single common line 240 within the array 200B. Furthermore, while the example of FIG. 2B illustrates three sets of unit cells - sets arranged along common lines 240-1, 240-2, and 240-3, respectively, in other embodiments, any other number of sets of unit cells along different common lines may be included. [0059] The unit cells 200A included within the array 200B arranged along any single common line may be identical in that they include the same number and type (e.g. superconducting qubits) of qubits 202 and in that they encompass the same number and type of interconnects 212, 214, 216, 218, and 220. However, the qubits 202 of the different unit cells may have different qubit frequencies. In addition, at least some of the interconnects 212, 214, 216, 218, and 220 in different unit cells may have different characteristics. For example, resonant frequencies of the readout resonators 218 encompassed by different unit cells may be different. Thus, while the qubit frequencies in the neighboring unit cells, or any unit cells arranged along a single common line, may be identical, their readout resonators may be of slightly different lengths and, therefore, of different frequencies. This may allow tying together in series, e.g. using vertical connectivity, the readout lines of neighboring unit cells, and still be able to read out all qubits uniquely.

[0060] Turning back to FIG. 2A, the unit cell 200A may be viewed as including two portions: a first portion 234 identified in FIG. 2A with a textured light grey background, and a second portion 236 which may include the rest of the area covered by the unit cell 200A (i.e. everything else in the unit cell 200A besides the first portion 234). The second portion 236 is identified in FIG. 2A with a background having slanted diagonal lines. In some embodiments, when unit cells 200A are tiled on a substrate to form a quantum circuit assembly, the one or more readout resonators 218 may be arranged within the quantum circuit assembly to be within the area covered by the first portion 234 of each unit cell 200A, while the one or more drive lines 220 may be arranged to be within the area covered by the second portion 236 of each unit cell 200A. Separating the drive lines 220 from the readout resonators 218 may be advantageous in order to minimize cross-talk between the readout resonators 218 and the drive lines 220, or to provide more space for the connection to the drive lines 220 or readout resonators 218.

[0061] The first portion 234 of the unit cell 200A may also be viewed as defined by the coupling resonators 216 which couple different pairs of the qubits 202 within the unit cell 200A. For example, the first portion 234 may be enclosed by, or the shape of the first portion 234 may be defined by these coupling resonators. In the example shown in FIG. 2A where the unit cell 200A includes four qubits 202, four coupling resonators 216 couple the four qubits 202 as shown in FIG. 2A, these four coupling resonators 216 arranged in a rectangle (i.e. the shape of the first portion 234 is a rectangle). In other embodiments, four coupling resonators coupling four qubits of a unit cell may be arranged in a parallelogram.

[0062] In addition to the coupling resonators 216 coupling different pairs of qubits 202 within each unit cell 200A, additional coupling resonators 216 may be associated with each unit cell, or each pair of unit cells, the additional coupling resonators configured to couple qubits of different unit cells.

Examples of such coupling resonators 216 are shown in FIG. 2A to be within the second portion 236 of the unit cell 200A. In this manner, all of the qubits provided on the substrate may be interconnected with one another into an array, as opposed to having islands of qubits on the substrate, where some islands are isolated from other islands.

[0063] In various embodiments, coupling resonators such as resonators 216 shown in FIGs. 2A and 2B, both resonators coupling qubits within each unit cell and resonators coupling qubits of different unit cells, may couple more than two qubits together.

[0064] In various embodiments, when tiled on a substrate, the unit cells may either be arranged with some space in between them (as e.g. shown in the example of FIG. 2B) or arranged immediately adjacent to one another, i.e. with each pair of the neighboring unit cells having a common side (as e.g. shown in the example of FIG. 3B, described below). Which one of these arrangements is selected may depend on various design and fabrication considerations, such as e.g. manufacturing considerations relating to the space required to provide all of the necessary qubits and interconnects, design considerations to prevent cross-talk between different interconnects, etc. The decision may also depend on how a unit cell is defined. For example, if a unit cell as shown in FIG. 2A would be defined as a larger rectangle, in particular as a rectangle extending further in the horizontal direction, similar to that shown to identify unit cells in FIG. 3B, then the array 200B of FIG. 2B would also include unit cells adjacent to one another.

[0065] In some embodiments, the drive lines 220 may be provided individually for each qubit 202, i.e. with a different drive line 220 for each of the qubits 202, as shown in the example of FIG. 2A. Doing so allows individually controlling a state of each of the qubits 202.

[0066] In other embodiments, shared drive lines 220 may be provided for a set of two or more qubits 202, which qubits could be from the same or different unit cells. Such embodiments allow sharing electrical connections for controlling states of groups of qubits, which may be advantageous in terms of reducing the number of interconnects in a quantum circuit assembly and/or sharing drive lines to set states of qubits in different unit cells simultaneously. An exemplary physical layout of a tileable unit cell and an array of tiled unit cells which are similar to those shown in FIGs. 2A and 2B but having shared drive lines is shown in FIGs. 3A and 3B illustrating unit cells 300A tiled into an array 300B and having some drive lines 320 shared between multiple qubits.

[0067] Except for the drive lines 320, the unit cell 300A and the array of qubits 300B shown in FIGs. 3A and 3B is similar to those shown in FIGs. 2A and 2B. Therefore, in the interests of brevity, discussions provided above with respect to FIGs. 2A and 2B are not repeated for similar elements shown in FIGs. 3A and 3B, e.g. discussions related to qubits 302, flux bias lines 312, microwave/readout lines 314, coupling resonators 316, readout resonators 318, as well as the first and second portions 334 and 336 of the simple polygon 330 with a base side 332. One further difference of the unit cells 300A and 200A is that the unit cell 300A is defined as that shown in FIG. 2A but extended further in the horizontal direction (i.e. the longer side of the rectangle of the unit cell 300A is longer than that of the rectangle of the unit cell 200A). [0068] FIG. 4A provides a schematic illustration of an exemplary physical layout of a tileable unit cell 400A having individual drive lines which unit cell, when tiled, results in an array of qubits with coupling resonators arranged in triangles as shown in FIG. 4B, according to some embodiments of the present disclosure.

[0069] In the exemplary embodiment shown in FIG. 4A, the unit cell 400A may be defined by a simple polygon 430, in this case the simple polygon being a rectangle, where a side 432, shown with a line that is thicker than lines of all other sides of the polygon 430, is defined as a base side of the unit cell. In other embodiments, sides of the polygon 430 other than the side 432 may be defined as base sides.

[0070] As shown in FIG. 4A, the unit cell 400A may include a plurality of qubits 402. Only one qubit 402 is labeled with a reference numeral in FIG. 4A for ease of illustration, but three qubits are indicated the unit cell 400A. In other embodiments, any other number of three or more qubits could be included within the unit cell 400A. In various embodiments, the qubit frequencies of different qubits 402 within a single unit cell may be either the same or different, as needed for a particular design. In various embodiments, even if the qubit frequencies of the different qubits 402 within a single unit cell are the same, the qubit frequencies of qubits in other unit cells of a tiled array may be different. As mentioned above, although qubits 402 shown in FIG. 4A are superconducting qubits, in particular - transmons, as illustrated in FIG. 4A by an interdigitated capacitor shown within the qubit 402, discussions provided herein are applicable, with apparent modifications, to other types of qubits, e.g. quantum dot qubits.

[0071] The unit cell 400A may encompass a plurality of interconnects including one or more of flux bias lines 412, one or more microwave/readout lines 414, one or more coupling resonators 416, one or more of readout resonators 418, and one or more of drive lines 420, the functionality of which is described above with reference to FIG. 1. In the example of FIG. 4A, the one or more flux bias lines 412 are shown as three flux bias lines 412, with one flux bias line per each of the qubits 402, although for the ease of illustration only a single flux bias line 412 is labeled with a reference numeral in FIG. 4A. Similarly, the one or more microwave/readout lines 414 are shown in the example of FIG. 4A as three microwave/readout lines 414, with one microwave/readout line per each of the qubits 402, although for the ease of illustration only a single microwave/readout line 414 is labeled with a reference numeral in FIG. 4A. The one or more of readout resonators 418 are shown in the example of FIG. 4A as a single readout resonator 418. Finally, the one or more of drive lines 420 are shown in the example of FIG. 4A as three individual drive lines 420, with one drive line per each of the qubits 402, although for the ease of illustration only a single drive line 420 is labeled with a reference numeral in FIG. 4A.

[0072] A plurality of the unit cells 400A and the associated interconnects 412, 414, 416, 418, and 420, as shown in FIG. 4A, may be arranged on a substrate suitable for forming quantum circuits thereon so that at least some of the unit cells are arranged on the substrate so that the base sides 432 of these unit cells are aligned along a common straight line. An example of such an arrangement is shown as an array 400B of an exemplary quantum circuit assembly in FIG. 4B. [0073] FIG. 4B illustrates three unit cells 400A, labeled as unit cells 400A-1, 400A-2, and 400A-3 arranged with their respective base sides 432 (not specifically shown in FIG. 4B in order to not clutter the drawing) along a common line 440-1. FIG. 4B further illustrates that the array 400B may further include additional rows of unit cells arranged along other common straight lines, labeled as lines 440-2 and 440-3. In some embodiments the sets of unit cells arranged along different common lines may be shifted with respect to one another - as shown in FIG. 4B with the staggered arrangement where the set of unit cells arranged along the line 440-2 is shifted with respect to the set of unit cells arranged along the lines 440-1 and 440-3.

[0074] While the example of FIG. 4B illustrates three unit cells arranged along the common line 440, in other embodiments, any other number of two or more unit cells 400A could be arranged along any single common line 440 within the array 400B - e.g. four unit cells 400A are arranged along the line 440-2. Furthermore, while the example of FIG. 4B illustrates three sets of unit cells - sets arranged along common lines 440-1, 440-2, and 440-3, respectively, in other embodiments, any other number of sets of unit cells along different common lines may be included.

[0075] The unit cells 400A included within the array 400B arranged along any single common line may be identical in that they include the same number and type (e.g. superconducting qubits) of qubits 402 and in that they encompass the same number and type of interconnects 412, 414, 416, 418, and 420. However, the qubits 402 of the different unit cells may have different qubit frequencies. In addition, at least some of the interconnects 412, 414, 416, 418, and 420 in different unit cells may have different characteristics. For example, resonant frequencies of the readout resonators 418 encompassed by different unit cells may be different. Thus, while the qubit frequencies in the neighboring unit cells, or any unit cells arranged along a single common line, may be identical, their readout resonators may be of slightly different lengths and, therefore, of different frequencies. This may allow tying together in series, e.g. using vertical connectivity, the readout lines of neighboring unit cells, and still be able to read out all qubits uniquely.

[0076] Turning back to FIG. 4A, the unit cell 400A may be viewed as including two portions: a first portion 434 identified in FIG. 4A with a textured light grey background, and a second portion 436 which may include the rest of the area covered by the unit cell 400A (i.e. everything else in the unit cell 400A besides the first portion 434). The second portion 436 is identified in FIG. 4A with a background having slanted diagonal lines. In some embodiments, when unit cells 400A are tiled on a substrate to form a quantum circuit assembly, the one or more readout resonators 418 may be arranged within the quantum circuit assembly to be within the area covered by the first portion 434 of each unit cell 400A, while the one or more drive lines 420 may be arranged to be within the area covered by the second portion 436 of each unit cell 400A. Such separation may provide advantages as described above with reference to the unit cell 200A. [0077] Similar to the architecture of the unit cell 200A described above, the first portion 434 of the unit cell 400A may also be viewed as defined by the coupling resonators 416 which couple different pairs of the qubits 402 within the unit cell 400A. For example, the first portion 434 may be enclosed by, or the shape of the first portion 434 may be defined by, these coupling resonators. In the example shown in FIG. 4A where the unit cell 400A includes three qubits 402, three coupling resonators 416 couple the three qubits 402 as shown in FIG. 4A, these three coupling resonators 416 arranged in a triangle (i.e. the shape of the first portion 434 is a triangle). In other embodiments, three coupling resonators coupling three qubits of a unit cell may be arranged in a slanted triangle (i.e. a triangle that is not symmetric as the one shown in FIG. 3A), such a slanted triangle not being shown in the figures.

[0078] In addition to the coupling resonators 416 coupling different pairs of qubits 402 within each unit cell 400A, additional coupling resonators 416 may be associated with each unit cell, or each pair of unit cells, the additional coupling resonators configured to couple qubits of different unit cells.

Examples of such coupling resonators 416 are shown in FIG. 4A to be within the second portion 436 of the unit cell 400A. In this manner, all of the qubits provided on the substrate may be interconnected with one another into an array, as opposed to having islands of qubits on the substrate, where some islands are isolated from other islands.

[0079] In various embodiments, coupling resonators such as resonators 416 shown in FIGs. 4A and 4B, both resonators coupling qubits within each unit cell and resonators coupling qubits of different unit cells, may couple more than two qubits together.

[0080] In various embodiments, when tiled on a substrate, the unit cells may either be arranged immediately adjacent to one another, i.e. with each pair of the neighboring unit cells having a common side (as e.g. shown in the example of FIG. 4B) or be arranged with some space in between them (not specifically shown in the figures). Again, which one of these arrangements is selected may depend on various design and fabrication considerations, such as e.g. manufacturing considerations relating to the space required to provide all of the necessary qubits and interconnects, design considerations to prevent cross-talk between different interconnects, etc. The decision may also depend on how a unit cell is defined, as described above in context of the unit cell 200A.

[0081] In some embodiments, the drive lines 420 may be provided individually for each qubit 402, i.e. with a different drive line 420 for each of the qubits 402, as shown in the example of FIG. 4A. Doing so allows individually controlling a state of each of the qubits 402.

[0082] In other embodiments, shared drive lines 420 may be provided for a set of two or more qubits 402, which qubits could be from the same or different unit cells. Such embodiments allow sharing electrical connections for controlling states of groups of qubits, which may be advantageous in terms of reducing the number of interconnects in a quantum circuit assembly and/or sharing drive lines to set states of qubits in different unit cells simultaneously. An exemplary physical layout of a tileable unit cell and an array of tiled unit cells which are similar to those shown in FIGs. 4A and 4B but having shared drive lines is shown in FIGs. 5A and 5B illustrating unit cells 500A tiled into an array 500B and having some drive lines 520 shared between multiple qubits.

[0083] Except for the drive lines 520, the unit cell 500A and the array of qubits 500B shown in FIGs. 5A and 5B is similar to those shown in FIGs. 4A and 4B. Therefore, in the interests of brevity, discussions provided above with respect to FIGs. 4A and 4B are not repeated for similar elements shown in FIGs. 5A and 5B, e.g. discussions related to qubits 502, flux bias lines 512, microwave/readout lines 514, coupling resonators 516, readout resonators 518, as well as the first and second portions 534 and 536 of the simple polygon 530 with a base side 532.

[0084] In various embodiments, other arrangements of the interconnects and qubits are possible within a unit cell and other arrangements of unit cells are possible when tiling the substrate, in line with explanations provided above, all of which are within the scope of the present disclosure. FIGs. 6A-6B and FIGs. 7A-7B provide two more examples of possible embodiments.

[0085] FIG. 6A provides a schematic illustration of an exemplary physical layout of a tileable unit cell 600A which, when tiled, results in an array 600B of qubits 602 with coupling resonators 616 arranged in parallelograms as shown in FIG. 6B, according to some embodiments of the present disclosure.

[0086] In the exemplary embodiment shown in FIG. 6A, the unit cell 600A may be defined by a simple polygon 630, in this case the simple polygon being a parallelogram where a side 632, shown with a line that is thicker than lines of all other sides of the polygon 630, is defined as a base side of the unit cell. In other embodiments, sides of the polygon 630 other than the side 632 may be defined as base sides. FIGs. 6A and 6B illustrate arrangements of unit cells 600A with qubits 602 and interconnects 612, 614, 616, 618, and 620 similar to those described above with reference to FIGs. 2A-5B. Therefore, discussions provided above for FIGs. 2A-5B are applicable to the examples illustrated in FIGs. 6A-6B and, in the interests of brevity, are not repeated. Instead, features specific/unique to the examples illustrated in FIGs. 6A-6B are described below.

[0087] One feature in FIGs. 6A-6B different from the illustrations of FIGs. 2A-5B is that the shared drive lines 620 are defined within a unit cell so that each of the three shared drive lines 620 are for driving three qubits of three different unit cells, as can be seen in the array 600B of FIG. 6B. Similarly, the flux bias lines 612 as defined in FIG. 6A are flux bias lines for the qubits of different unit cells, namely three flux bias lines within each cell for three qubits of three different unit cells, as also can be seen in the array 600B of FIG. 6B. Another feature of FIGs. 6A-6B different from the illustrations of FIGs. 2A-5B is that the sides of the polygon 630 coincide with some of the coupling resonators 616.

[0088] Furthermore, FIG. 6A illustrates first and second portions 634 and 636. These portions may be similar to those shown in FIGs. 2A-5B in that when unit cells 600A are tiled on a substrate to form a quantum circuit assembly, the one or more readout resonators 618 of each unit cell may be arranged within the quantum circuit assembly to be within the area covered by the first portion 634 of each unit cell 600A, while the one or more drive lines 620 defined within each unit cell may be arranged to be within the area covered by the second portion 636. The first portion 634 of the unit cell 600A is different from the first portion 234 of the unit cell 200A in that the first portion 634 may be viewed as defined by four coupling resonators 616 which couple qubits 602 of different unit cells - namely, the three qubits 602 of one unit cell with a qubit 602 of an adjacent qubit cell. As shown in FIGs. 6A-6B, such four coupling resonators 616 may be arranged in a parallelogram.

[0089] FIG. 6B illustrates three unit cells 600A, labeled as unit cells 600A-1, 600A-2, and 600A-3 arranged with their respective base sides 632 (not specifically shown in FIG. 6B in order to not clutter the drawing) along a common line 640-1. FIG. 6B further illustrates that the array 600B may further include additional rows of unit cells arranged along other common straight lines, labeled as lines 640-2, 640-3, and 640-4. While the example of FIG. 6B illustrates particular numbers of unit cells arranged along each of the common lines 640, in other embodiments, any other number of two or more unit cells 600A could be arranged along any single common line 640 within the array 600B. Furthermore, while the example of FIG. 6B illustrates four sets of unit cells - sets arranged along common lines 640-1, 640- 2, 640-3, and 640-4, respectively, in other embodiments, any other number of sets of unit cells along different common lines may be included.

[0090] FIG. 7A provides a schematic illustration of an exemplary physical layout of a tileable unit cell 700A which, when tiled, results in an array 700B of qubits 702 with coupling resonators 716 arranged in hexagons as shown in FIG. 7B, according to some embodiments of the present disclosure.

[0091] In the exemplary embodiment shown in FIG. 7A, the unit cell 700A may be defined by a simple polygon 730, in this case the simple polygon being a rectangle, where a side 732, shown with a line that is thicker than lines of all other sides of the polygon 730, is defined as a base side of the unit cell. In other embodiments, sides of the polygon 730 other than the side 732 may be defined as base sides. FIGs. 7A and 7B illustrate arrangements of unit cells 700A with qubits 702 and interconnects 712, 714, 716, 718, and 720 similar to those described above with reference to FIGs. 2A-6B. Therefore, discussions provided above for FIGs. 2A-6B are applicable to the examples illustrated in FIGs. 7A-7B and, in the interests of brevity, are not repeated. Instead, features specific/unique to the examples illustrated in FIGs. 7A-7B are described below.

[0092] One feature in FIGs. 7A-7B different from the illustrations of FIGs. 2A-6B is that the qubits of the tiled array 700B are placed at along the sides formed by the hexagonal lattice of the tiled array 700B rather than at its vertices. Another difference is that the three individual (i.e. not shared) drive lines 720 are defined within a unit cell so that two of these drives lines are for driving two qubits of one unit cell, while the third drive line is for driving a qubit of an adjacent unit cell, as can be seen in the array 700B of FIG. 7B.

[0093] FIG. 7A illustrates first and second portions 734 and 736. The first portion 734 is similar to that shown in previous figures in that the readout resonators 718 corresponding to the three qubits 702 of each unit cell 700A are enclosed within the first portion 734, and one or more drive lines 720 defined within the unit cell 700A are enclosed within the second portion 736. There are also some differences. For example, the second portion 736 as shown in FIG. 7A includes two sub-portions - 736-1 and 736-2. The sub-portion 736-1 encompasses two drive lines 720 for driving two qubits 702 of the unit cell 700A shown in FIG. 7A. The sub-portion 736-2 encompasses a drive line for driving a qubit of an adjacent unit cell (the adjacent unit cell not specifically shown in FIG. 7A, but shown in the tiled array 700B of FIG. 7B). The first portion 734 of the unit cell 700A is also different from the first portion 234 of the unit cell 200A in that the first portion 734 is only partially defined by coupling resonators 716 which couple some of the qubits 702 of the unit cell 700A. Irrespective of the division into first and second portions, when unit cells 700A are tiled as shown with the array 700B of FIG. 7B, sets of six coupling resonators 716 of different adjacent unit cells (namely, of four adjacent unit cells) are arranged in hexagons. Thus, a hexagonal lattice of coupling resonators 716 is formed with the tiled array as shown in FIG. 7B. Each such hexagon encloses the readout resonator 718 of one of the unit cells.

[0094] FIG. 7B illustrates four unit cells 700A, labeled as unit cells 700A-1, 700A-2, 700-3, and 700A-4 arranged with their respective base sides 732 (not specifically shown in FIG. 7B in order to not clutter the drawing) along a common line 740-1. FIG. 7B further illustrates that the array 700B may further include additional rows of unit cells arranged along other common straight lines, labeled as lines 740-2 and 740-3. While the example of FIG. 7B illustrates particular numbers of unit cells arranged along each of the common lines 740, in other embodiments, any other number of two or more unit cells 700A could be arranged along any single common line 740 within the array 700B. Furthermore, while the example of FIG. 7B illustrates three sets of unit cells - sets arranged along common lines 740-1, 740-2, and 740-3, respectively, in other embodiments, any other number of sets of unit cells along different common lines may be included.

Exemplary quantum computing device

[0095] In various embodiments, quantum circuit assemblies that include one or more tileable arrays of qubits as described herein may be used to implement components associated with a quantum integrated circuit (IC). Such components may include those that are mounted on or embedded in a quantum IC, or those connected to a quantum IC. The quantum IC may be either analog or digital and may be used in a number of applications within or associated with quantum systems, such as e.g.

quantum processors, quantum amplifiers, quantum sensors, etc., depending on the components associated with the integrated circuit. The integrated circuit may be employed as part of a chipset for executing one or more related functions in a quantum system.

[0096] FIG. 8 provides a schematic illustration of an exemplary quantum computing device 2000 that may include one or more tileable arrays of qubits as described herein, according to some embodiments of the present disclosure.

[0097] A number of components are illustrated in FIG. 8 as included in the quantum computing device 2000, but any one or more of these components may be omitted or duplicated, as suitable for the application. In some embodiments, some or all of the components included in the quantum computing device 2000 may be attached to one or more printed circuit boards (e.g., a motherboard). In some embodiments, various ones of these components may be fabricated onto a single system-on-a-chip (SoC) die. Additionally, in various embodiments, the quantum computing device 2000 may not include one or more of the components illustrated in FIG. 8, but the quantum computing device 2000 may include interface circuitry for coupling to the one or more components. For example, the quantum computing device 2000 may not include a display device 2006, but may include display device interface circuitry (e.g., a connector and driver circuitry) to which a display device 2006 may be coupled. In another set of examples, the quantum computing device 2000 may not include an audio input device 2018 or an audio output device 2008, but may include audio input or output device interface circuitry (e.g., connectors and supporting circuitry) to which an audio input device 2018 or audio output device 2008 may be coupled.

[0098] The quantum computing device 2000 may include a processing device 2002 (e.g., one or more processing devices). As used herein, the term "processing device" or "processor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory. The processing device 2002 may include a quantum processing device 2026 (e.g., one or more quantum processing devices), and a non-quantum processing device 2028 (e.g., one or more non-quantum processing devices). The quantum processing device 2026 may include one or more of the quantum circuit assemblies/components disclosed herein, and may perform data processing by performing operations on the qubits that may be generated in the quantum circuits, and monitoring the result of those operations. For example, different qubits may be allowed to interact, the quantum states of different qubits may be set or transformed, and the quantum states of qubits may be read (e.g., by another qubit via a coupling resonator or externally via a readout resonator). The quantum processing device 2026 may be a universal quantum processor, or specialized quantum processor configured to run one or more particular quantum algorithms. In some embodiments, the quantum processing device 2026 may execute algorithms that are particularly suitable for quantum computers, such as cryptographic algorithms that utilize prime factorization, encryption/decryption, algorithms to optimize chemical reactions, algorithms to model protein folding, etc. The quantum processing device 2026 may also include support circuitry to support the processing capability of the quantum processing device 2026, such as input/output channels, multiplexers, signal mixers, quantum amplifiers, and analog-to- digital converters.

[0099] As noted above, the processing device 2002 may include a non-quantum processing device 2028. In some embodiments, the non-quantum processing device 2028 may provide peripheral logic to support the operation of the quantum processing device 2026. For example, the non-quantum processing device 2028 may control the performance of a read operation, control the performance of a write operation, control the clearing of quantum bits, etc. The non-quantum processing device 2028 may also perform conventional computing functions to supplement the computing functions provided by the quantum processing device 2026. For example, the non-quantum processing device 2028 may interface with one or more of the other components of the quantum computing device 2000 (e.g., the communication chip 2012 discussed below, the display device 2006 discussed below, etc.) in a conventional manner, and may serve as an interface between the quantum processing device 2026 and conventional components. The non-quantum processing device 2028 may include one or more digital signal processors (DSPs), application-specific integrated circuits (ASICs), central processing units (CPUs), graphics processing units (GPUs), crypto processors (specialized processors that execute cryptographic algorithms within hardware), server processors, or any other suitable processing devices.

[00100]The quantum computing device 2000 may include a memory 2004, which may itself include one or more memory devices such as volatile memory (e.g., dynamic random access memory (DRAM)), nonvolatile memory (e.g., read-only memory (ROM)), flash memory, solid state memory, and/or a hard drive. In some embodiments, the states of qubits in the quantum processing device 2026 may be read and stored in the memory 2004. In some embodiments, the memory 2004 may include memory that shares a die with the non-quantum processing device 2028. This memory may be used as cache memory and may include embedded dynamic random access memory (eDRAM) or spin transfer torque magnetic random-access memory (STT-MRAM).

[00101]The quantum computing device 2000 may include a cooling apparatus 2024. The cooling apparatus 2024 may maintain the quantum processing device 2026 at a predetermined low

temperature during operation to reduce the effects of scattering in the quantum processing device 2026. This predetermined low temperature may vary depending on the setting; in some embodiments, the temperature may be 5 degrees Kelvin or less. In some embodiments, the non-quantum processing device 2028 (and various other components of the quantum computing device 2000) may not be cooled by the cooling apparatus 2024, and may instead operate at room temperature. The cooling apparatus 2024 may be, for example, a dilution refrigerator, a helium-3 refrigerator, or a liquid helium

refrigerator.

[00102] In some embodiments, the quantum computing device 2000 may include a communication chip 2012 (e.g., one or more communication chips). For example, the communication chip 2012 may be configured for managing wireless communications for the transfer of data to and from the quantum computing device 2000. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a nonsolid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. [00103]The communication chip 2012 may implement any of a number of wireless standards or protocols, including but not limited to Institute for Electrical and Electronic Engineers (IEEE) standards including Wi-Fi (IEEE 1402.11 family), IEEE 1402.16 standards (e.g., IEEE 1402.16-2005 Amendment), Long-Term Evolution (LTE) project along with any amendments, updates, and/or revisions (e.g., advanced LTE project, ultramobile broadband (UMB) project (also referred to as "3GPP2"), etc.). IEEE 1402.16 compatible Broadband Wireless Access (BWA) networks are generally referred to as WiMAX networks, an acronym that stands for Worldwide Interoperability for Microwave Access, which is a certification mark for products that pass conformity and interoperability tests for the IEEE 1402.16 standards. The communication chip 2012 may operate in accordance with a Global System for Mobile Communication (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), High Speed Packet Access (HSPA), Evolved HSPA (E-HSPA), or LTE network. The communication chip 2012 may operate in accordance with Enhanced Data for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN). The communication chip 2012 may operate in accordance with Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Evolution-Data Optimized (EV-DO), and derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The communication chip 2012 may operate in accordance with other wireless protocols in other embodiments. The quantum computing device 2000 may include an antenna 2022 to facilitate wireless communications and/or to receive other wireless communications (such as AM or FM radio transmissions).

[00104] In some embodiments, the communication chip 2012 may manage wired communications, such as electrical, optical, or any other suitable communication protocols (e.g., the Ethernet). As noted above, the communication chip 2012 may include multiple communication chips. For instance, a first communication chip 2012 may be dedicated to shorter-range wireless communications such as Wi-Fi or Bluetooth, and a second communication chip 2012 may be dedicated to longer-range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, EV-DO, or others. In some

embodiments, a first communication chip 2012 may be dedicated to wireless communications, and a second communication chip 2012 may be dedicated to wired communications.

[00105]The quantum computing device 2000 may include battery/power circuitry 2014. The battery/power circuitry 2014 may include one or more energy storage devices (e.g., batteries or capacitors) and/or circuitry for coupling components of the quantum computing device 2000 to an energy source separate from the quantum computing device 2000 (e.g., AC line power).

[00106]The quantum computing device 2000 may include a display device 2006 (or corresponding interface circuitry, as discussed above). The display device 2006 may include any visual indicators, such as a heads-up display, a computer monitor, a projector, a touchscreen display, a liquid crystal display (LCD), a light-emitting diode display, or a flat panel display, for example. [00107] The quantum computing device 2000 may include an audio output device 2008 (or

corresponding interface circuitry, as discussed above). The audio output device 2008 may include any device that generates an audible indicator, such as speakers, headsets, or earbuds, for example.

[00108] The quantum computing device 2000 may include an audio input device 2018 (or corresponding interface circuitry, as discussed above). The audio input device 2018 may include any device that generates a signal representative of a sound, such as microphones, microphone arrays, or digital instruments (e.g., instruments having a musical instrument digital interface (M IDI) output).

[00109] The quantum computing device 2000 may include a global positioning system (GPS) device 2016 (or corresponding interface circuitry, as discussed above). The GPS device 2016 may be in

communication with a satellite-based system and may receive a location of the quantum computing device 2000, as known in the art.

[00110] The quantum computing device 2000 may include an other output device 2010 (or

corresponding interface circuitry, as discussed above). Examples of the other output device 2010 may include an audio codec, a video codec, a printer, a wired or wireless transmitter for providing information to other devices, or an additional storage device.

[00111] The quantum computing device 2000 may include an other input device 2020 (or corresponding interface circuitry, as discussed above). Examples of the other input device 2020 may include an accelerometer, a gyroscope, a compass, an image capture device, a keyboard, a cursor control device such as a mouse, a stylus, a touchpad, a bar code reader, a Quick Response (QR) code reader, any sensor, or a radio frequency identification (RFI D) reader.

[00112] The quantum computing device 2000, or a subset of its components, may have any appropriate form factor, such as a hand-held or mobile computing device (e.g., a cell phone, a smart phone, a mobile internet device, a music player, a tablet computer, a laptop computer, a netbook computer, an ultrabook computer, a personal digital assistant (PDA), an ultramobile personal computer, etc.), a desktop computing device, a server or other networked computing component, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a vehicle control unit, a digital camera, a digital video recorder, or a wearable computing device.

Selected Examples

[00113] Some Examples in accordance with various embodiments of the present disclosure are now described.

[00114] Example 1 provides a quantum circuit assembly, including a substrate; and a plurality of substantially identical unit cells on a substrate, each unit cell including a plurality of qubits and having a side defined as a base side. Two or more unit cells of the plurality of unit cells are arranged on the substrate so that the base side of each unit cell is aligned along a common straight line. [00115] Example 2 provides the quantum circuit assembly according to Example 1, where a shape of each unit cell is a simple polygon and where the base side is one (predefined) side of the simple polygon.

[00116] Example 3 provides the quantum circuit assembly according to Examples 1 or 2, where the each unit cell includes a first portion and a second portion, the second portion being different from the first portion, and the quantum circuit assembly further includes one or more readout resonators corresponding to the plurality of qubits of the each unit cell enclosed within the first portion of the each unit cell and one or more drive lines enclosed within the second portion of each unit cell.

[00117] Example 4 provides the quantum circuit assembly according to Example 3, where resonant frequencies of the one or more readout resonators enclosed within the first portions of at least some of the plurality of unit cells are different. Thus, while the qubit frequencies in the neighboring unit cells may be identical, their readout resonators may be of slightly different lengths and, therefore, of different frequencies.

[00118] Example 5 provides the quantum circuit assembly according to Example 3, where the quantum circuit assembly further includes a plurality of coupling resonators corresponding to the plurality of qubits of the each unit cell, and the first portion of the each unit cell is substantially enclosed by or the shape of the first portion is substantially defined by three or more of the plurality of coupling resonators.

[00119] Example 6 provides the quantum circuit assembly according to any one of Examples 1-4, where the quantum circuit assembly further includes a plurality of coupling resonators and where at least some of the plurality of coupling resonators couple qubits of different unit cells of the plurality of unit cells.

[00120] Example 7 provides the quantum circuit assembly according to any one of Examples 1-4, where the plurality of qubits of the each unit cell includes four qubits, and the quantum circuit assembly further includes, for the each unit cell, four coupling resonators configured to couple four different pairs of the four qubits of the each unit cell, as e.g. shown with exemplary layouts of FIGs. 2A-2B and FIGs. 3A-3B.

[00121] Example 8 provides the quantum circuit assembly according to Example 7, where the four coupling resonators of the each unit cell are arranged in a rectangle, as e.g. shown with exemplary layouts of FIGs. 2A-2B and FIGs. 3A-3B.

[00122] Example 9 provides the quantum circuit assembly according to any one of Examples 1-4, where the plurality of qubits of the each unit cell includes three qubits, and the quantum circuit assembly further includes, for the each unit cell, three coupling resonators configured to couple three different pairs of the three qubits of the each unit cell, as e.g. shown with exemplary layouts of FIGs. 4A-4B and FIGs. 5A-5B. [00123] Example 10 provides the quantum circuit assembly according to Example 9, where the three coupling resonators of the each unit cell are arranged in a triangle, as e.g. shown with exemplary layouts of FIGs. 4A-4B and FIGs. 5A-5B.

[00124] Example 11 provides the quantum circuit assembly according to any one of Examples 1-4, where the plurality of qubits of the each unit cell includes three qubits, and the quantum circuit assembly further includes, for the each unit cell, four coupling resonators configured to couple three different pairs of a set of four qubits including the three qubits of the each unit cell and one qubit of an adjacent unit cell, as e.g. shown with an exemplary layout of FIGs. 6A-6B.

[00125] Example 12 provides the quantum circuit assembly according to Example 11, where the four coupling resonators configured to couple three different pairs of the set of four qubits are arranged in a parallelogram, as e.g. shown with an exemplary layout of FIGs. 6A-6B.

[00126] Example 13 provides the quantum circuit assembly according to any one of Examples 1-4, where the plurality of qubits of the each unit cell includes three qubits, and the quantum circuit assembly further includes six coupling resonators configured to, when three unit cells of the plurality of unit cells are arranged adjacent to one another, couple six qubits of the three unit cells, as e.g. shown with an exemplary layout of FIGs. 7A-7B.

[00127] Example 14 provides the quantum circuit assembly according to Example 13, where the six coupling resonators are arranged in a hexagon, as e.g. shown with an exemplary layout of FIG. 7B.

[00128] Example 15 provides the quantum circuit assembly according to any one of the preceding Examples, where at least some of the two closest unit cells of the plurality of unit cells arranged on the substrate so that the base side of each unit cell is aligned along the common straight line are not adjacent to one another. Thus, in some embodiments, such unit cells may be separated by space or even by one or more other unit cells which do not have base side(s) aligned along the same common straight line.

[00129] Example 16 provides the quantum circuit assembly according to any one of the preceding Examples, where qubit frequencies of the plurality of qubits in each unit cell of at least some of the plurality of unit cells are different.

[00130] Example 17 provides the quantum circuit assembly according to any one of Examples 1-16, further including a different/individual drive line for each qubit of the plurality of qubits in each unit cell. Such an embodiment allows individually controlling states of each of the qubits.

[00131] Example 18 provides the quantum circuit assembly according to any one of Examples 1-16, further including one or more shared drive lines for each set of one or more sets of two or more qubits on the substrate. Such an embodiment allows sharing drive lines for controlling states of groups of qubits. [00132] Example 19 provides the quantum circuit assembly according to Example 17, where at least some qubits of the two or more qubits of the each set belong to different unit cells. Such an embodiment allows sharing a drive line to set states of qubits in different unit cells simultaneously.

[00133] Example 20 provides the quantum circuit assembly according to any one of the preceding Examples, where the plurality of qubits includes the plurality of superconducting qubits.

[00134] Other Examples provide the quantum circuit assembly according to any one of the preceding Examples where the plurality of qubits may include a plurality of quantum dot qubits.

[00135] Example 21 provides a quantum computing device, including a quantum processing device and a non-quantum processing device, coupled to the quantum processing device and configured to control operation of the quantum processing device. The quantum processing device includes a quantum circuit assembly including a substrate and a plurality of substantially identical unit cells on a substrate, each unit cell including a plurality of qubits and having a side defined as a base side, where two or more unit cells of the plurality of unit cells are arranged on the substrate so that the base side of each unit cell is aligned along a common straight line.

[00136] Example 22 provides the quantum computing device according to Example 21, further including a cooling apparatus configured to maintain a temperature of the quantum processing device below 5 degrees Kelvin.

[00137] Example 23 provides the quantum computing device according to Examples 21 or 22, further including a memory device configured to store data generated during operation of the quantum processing device.

[00138] Example 24 provides the method of manufacturing a quantum circuit assembly, the method including providing a plurality of substantially identical unit cells on a substrate, each unit cell including a plurality of qubits and having a side defined as a base side, where two or more unit cells of the plurality of unit cells are arranged on the substrate so that the base side of each unit cell is aligned along a common straight line.

[00139] Example 25 provides the method according to Example 24, further including providing one or more of one or more readout resonators corresponding to the plurality of qubits of the each unit cell, one or more drive lines corresponding to the plurality of qubits of the each unit cell, and a plurality of coupling resonators corresponding to the plurality of qubits of the each unit cell.

[00140] The above description of illustrated implementations of the disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. While specific implementations of, and examples for, the disclosure are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the disclosure, as those skilled in the relevant art will recognize.

[00141] These modifications may be made to the disclosure in light of the above detailed description. The terms used in the following claims should not be construed to limit the disclosure to the specific implementations disclosed in the specification and the claims. Rather, the scope of the disclosure is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.