Title:
TRANSISTOR AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/106955
Kind Code:
A1
Abstract:
The present invention provides: a transistor which has a large S value; and a semiconductor device which carries out a calculation by utilizing an operation of a transistor in the subthreshold region. A transistor which comprises: an oxide semiconductor layer which has a channel formation region; a gate electrode which has a region that overlaps with the oxide semiconductor layer, with an insulating layer being interposed therebetween; and a first conductive layer which has a region that overlaps with the oxide semiconductor layer, with a ferroelectric layer being interposed therebetween. In particular, the ferroelectric layer comprises a crystal which has a crystal structure that exhibits ferroelectric properties.
Inventors:
ITO YUKI (JP)
KUNITAKE HITOSHI (JP)
TANEMURA KAZUKI (JP)
KUNITAKE HITOSHI (JP)
TANEMURA KAZUKI (JP)
Application Number:
PCT/IB2021/060337
Publication Date:
May 27, 2022
Filing Date:
November 09, 2021
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L29/786; G06G7/16; G06N3/063; H01L21/8234; H01L27/06; H01L27/088; H01L27/1159
Domestic Patent References:
| WO2010131311A1 | 2010-11-18 | |||
| WO2017090559A1 | 2017-06-01 | |||
| WO2018234919A1 | 2018-12-27 |
Foreign References:
| JP2011049537A | 2011-03-10 | |||
| JP2019023853A | 2019-02-14 |
Download PDF:
Previous Patent: SECONDARY BATTERY, POWER STORAGE SYSTEM, VEHICLE, AND POSITIVE ELECTRODE PRODUCTION METHOD
Next Patent: SEMICONDUCTOR DEVICE
Next Patent: SEMICONDUCTOR DEVICE