Title:
USER-LEVEL THREADING FOR SIMULATING MULTI-CORE PROCESSOR
Document Type and Number:
WIPO Patent Application WO/2023/103773
Kind Code:
A1
Abstract:
A method improves an execution speed of a host multi-core simulator simulating a target multi-core processor that has a hierarchical architecture including multiple corelets per core that, in turn include multiple functional units. The host multi-core simulator is implemented using multiple OS threads. The method selects layers in the hierarchical architecture to simulate on one of the OS threads, based on a shortest estimated layer execution time determined by (1.0+t/c*s) /min (c, t), wherein c is a number of cores in the simulator, t is a number of OS threads, and s is a threading overhead coefficient. The method respectively executes, from among the selected layers, a parallel simulation of the units therein that frequently communicate with each other on one of the multiple OS threads based on a communication frequency threshold, by assigning and using a respective user-level thread for each of the units from among a plurality of user-level threads.
Inventors:
INOUE HIROSHI (JP)
Application Number:
PCT/CN2022/133697
Publication Date:
June 15, 2023
Filing Date:
November 23, 2022
Export Citation:
Assignee:
IBM (US)
IBM CHINA CO LTD (CN)
IBM CHINA CO LTD (CN)
International Classes:
H04B1/707
Foreign References:
| EP1065611A2 | 2001-01-03 | |||
| CN101706742A | 2010-05-12 | |||
| US20150095010A1 | 2015-04-02 |
Attorney, Agent or Firm:
ZHONGZI LAW OFFICE (CN)
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