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Title:
VERTICAL GALLIUM OXIDE TRANSISTOR AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/050865
Kind Code:
A1
Abstract:
Disclosed in the present invention are a vertical gallium oxide transistor and a preparation method therefor in the technical field of semiconductors. The method comprises the following steps: annealing a gallium oxide material in an oxygen atmosphere within the range of 1000-1400 ℃ for 1-24 hours to form a single crystal layer, defect layers and oxidized layers; removing the defect layer and the oxidized layer on the back surface of the gallium oxide material and the defect layer on the front surface of the gallium oxide material to obtain an initial sample; and preparing a heavily-doped contact layer on each oxidized layer, preparing a source electrode layer on the contact layer, preparing a channel perpendicular to a sample plane, preparing a gate dielectric layer in the channel, and preparing a gate electrode and a drain electrode. To solve the problems of insufficient current, difficulty in achieving enhancement mode, and the tendency for threshold voltage deviation in existing gallium oxide field effect transistors, the gallium oxide field effect transistor having a vertical structure and working in a quasi-inversion mode and a preparation method therefor are designed.

Inventors:
ZHOU XUANZE (CN)
XU GUANGWEI (CN)
LONG SHIBING (CN)
Application Number:
PCT/CN2022/119566
Publication Date:
March 14, 2024
Filing Date:
September 19, 2022
Export Citation:
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Assignee:
UNIV SCIENCE & TECHNOLOGY CHINA (CN)
International Classes:
H01L21/34
Foreign References:
CN113421914A2021-09-21
CN110148625A2019-08-20
CN113257924A2021-08-13
CN113622027A2021-11-09
CN114086254A2022-02-25
US20220209000A12022-06-30
Attorney, Agent or Firm:
HANGZHOU YUYANG UNIONPATENT AGENCY CO., LTD. (CN)
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