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Title:
VERTICAL ORGANIC FET AND ITS MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2005/020342
Kind Code:
A1
Abstract:
A vertical organic FET in which the molecular orientation of the active layer formed of an organic semiconductor is suppressed and the carrier mobility is improved. The vertical organic FET has a structure where at least a source electrode layer, a drain electrode layer, a gate electrode layer, and an active layer are provided on a substrate, and the source electrode layer, the active layer, and the drain layer are formed in order of mention in multilayer. The vertical organic FET is such that (1) the source and drain electrode layers are provided substantially parallel to the surface of the substrate, (2) the source and drain electrode layers are made of a conductive member, (3) the active layer is substantially made of a phthalocyanine compound having a tetravalent or hexavalent atom of an element as a central atom and coordinated with ligands (X1, X2) in the direction perpendicular to the molecular surface, and (4) the compound is so deposited that the molecular surface of each molecule of the compound is parallel to at least one of the source and drain electrode layers.

Inventors:
MIYAMOTO AKIHITO (JP)
Application Number:
PCT/JP2004/012413
Publication Date:
March 03, 2005
Filing Date:
August 23, 2004
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
MIYAMOTO AKIHITO (JP)
International Classes:
H01L29/78; H01L29/786; H01L51/00; H01L51/30; (IPC1-7): H01L51/00; H01L29/80; H01L29/78; H01L29/786
Foreign References:
JP2002009290A2002-01-11
JP2000174277A2000-06-23
Attorney, Agent or Firm:
Saegusa, Eiji (1-7-1 Doshomachi, Chuo-ku, Osaka-sh, Osaka 45, JP)
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