Title:
VERTICAL TRANSISTOR, STORAGE UNIT AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/036826
Kind Code:
A1
Abstract:
Embodiments of the present application provide a vertical transistor, a storage unit and a manufacturing method therefor. In the vertical transistor provided by the embodiments of the present application, a semiconductor layer is configured to comprise a first semiconductor layer and a second semiconductor layer which are arranged at an interval, and a first gate is configured to be located between the first semiconductor layer and the second semiconductor layer, so that an electric field can be applied to the first semiconductor layer and the second semiconductor layer at the same time by means of the first gate. The first semiconductor layer and the second semiconductor layer can be driven at the same time, so that the on-state current of the vertical transistor can be increased, thereby improving the performance of the vertical transistor.
Inventors:
LI HUIHUI (CN)
ZHANG YUNSEN (CN)
WANG GUILEI (CN)
ZHAO CHAO (CN)
ZHANG YUNSEN (CN)
WANG GUILEI (CN)
ZHAO CHAO (CN)
Application Number:
PCT/CN2022/137310
Publication Date:
February 22, 2024
Filing Date:
December 07, 2022
Export Citation:
Assignee:
BEIJING SUPERSTRING ACADEMY OF MEMORY TECH (CN)
International Classes:
H01L29/06; H01B12/00; H01L21/336; H01L29/786
Foreign References:
| CN113594162A | 2021-11-02 | |||
| CN101090117A | 2007-12-19 | |||
| CN114649336A | 2022-06-21 | |||
| US20140167030A1 | 2014-06-19 |
Attorney, Agent or Firm:
LIFANG & PARTNERS (CN)
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