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Title:
VIRTUAL SYNCHRONOUS MACHINES WITH IMPROVED VOLTAGE AND FREQUENCY CONTROL
Document Type and Number:
WIPO Patent Application WO/2022/009101
Kind Code:
A1
Abstract:
Electrical apparatus (20) includes an inverter (24) having input terminals for receiving DC input power and output terminals for coupling to an AC power grid. A pulse-width modulation (PWM) generator and drivers (26) drive the switches so as to control respective amplitudes, frequencies, and phases of the output current waveforms of the inverter. Control circuitry (28) receives measurements of respective time-varying voltages and currents on the input and output terminals, computes a model (40) that includes three virtual currents flowing in a synchronous machine that is emulated by the apparatus, wherein the three virtual currents are associated respectively with the three output current waveforms, and controls the PWM generator and drivers responsively to the three virtual currents so as to synchronize the amplitudes, frequencies, and phases of the three output current waveforms of the inverter with the three phases of the AC power grid.

Inventors:
WEISS GEORGE (IL)
KUSTANOVICH ZEEV (IL)
SHANI BENJAMIN (IL)
Application Number:
PCT/IB2021/056069
Publication Date:
January 13, 2022
Filing Date:
July 07, 2021
Export Citation:
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Assignee:
UNIV RAMOT (IL)
International Classes:
H02M7/42; H02J3/38; H02M1/00; H02P9/10
Domestic Patent References:
WO2015075923A12015-05-28
WO2010055322A22010-05-20
Foreign References:
EP2963759A12016-01-06
US20200091728A12020-03-19
US20190123559A12019-04-25
CN104953617A2015-09-30
CN106786599A2017-05-31
CN103683331A2014-03-26
US20190222026A12019-07-18
Other References:
ZHONG, Q.C ET AL.: "Self-Synchronized Synchronverters: Inverters without a dedicated synchronization unit", IEEE TRANS. POWER ELECTRONICS, vol. 29, 31 December 2014 (2014-12-31), pages 617 - 630, XP011524672, DOI: 10.1109/TPEL.2013.2258684
NATARAJAN, V ET AL.: "Synchronverters with better stability due to virtual inductors, virtual capacitors, and anti-windup", IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, vol. 64, 31 December 2017 (2017-12-31), pages 5994 - 6004, XP011652280, DOI: 10.1109/TIE.2017.2674611
SHIVRATRI SHIVPRASAD, KUSTANOVICH ZEEV, WEISS GEORGE, SHANI BENNY: "Virtual synchronous machines with fast current loop", IFAC-PAPERSONLINE, vol. 53, no. 2, 1 January 2020 (2020-01-01), DE , pages 12422 - 12428, XP055897649, ISSN: 2405-8963, DOI: 10.1016/j.ifacol.2020.12.1304
SHUAI ZHIKANG, HUANG WEN, SHEN CHAO, GE JUN, SHEN Z. JOHN: "Characteristics and Restraining Method of Fast Transient Inrush Fault Currents in Synchronverters", IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, vol. 64, no. 9, 1 September 2017 (2017-09-01), USA , pages 7487 - 7497, XP055897650, ISSN: 0278-0046, DOI: 10.1109/TIE.2017.2652362
Attorney, Agent or Firm:
KLIGLER & ASSOCIATES PATENT ATTORNEYS LTD. (IL)
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Claims:
CLAIMS

1. Electrical apparatus, comprising: an inverter having input ter inals for receiving DC input power and output terminals for coupling to an AC power grid having three phases, and comprising an array of switches and filtering circuits configured to convert the DC input power to three-phase AC output power, by producing three output current waveforms at the output terminals; a pulse- width modulation (PWM) generator and drivers, which are coupled to drive the switches so as to control respective amplitudes, frequencies, and phases of the output current waveforms; and control circuitry, which is coupled to receive measurements of respective time-varying voltages and currents on the input and output terminals, and to compute a model, responsively to the measurements, that includes three virtual currents flowing in a synchronous machine that is emulated by the apparatus, wherein the three virtual currents are associated respectively with the three output current waveforms, and to control the PWM generator and drivers responsively to the three virtual currents so as to synchronize the amplitudes, frequencies, and phases of the three output current waveforms of the inverter with the three phases of the AC power grid.

2. The apparatus according to claim 1, wherein the model comprises current control loops, which generate three control voltages for controlling the PWM generator and drivers, and wherein the control circuitry is configured to compute, responsively to the virtual currents, reference currents for input to the current control loops.

3. The apparatus according to claim 2, wherein the control circuitry is configured to ramp the reference currents from zero to the virtual currents upon initiation of operation of the apparatus.

4. The apparatus according to claim 2, wherein the current control loop comprises virtual capacitors, which are applied to filter DC components out of the three output current waveforms by modifying average voltages output from the array of switches.

5. The apparatus according to any of claims 1-4, wherein the emulated synchronous machine has a given rotor angular frequency and rotor field, and wherein the control circuitry is configured to compute, responsively to the virtual currents, the rotor field, and a difference between the rotor angular frequency and a grid frequency of the AC power grid, an emulated limited active torque and an emulated electrical torque, for application to the synchronous machine, thus determining a time derivative of the rotor angular frequency.

6. The apparatus according to claim 5, wherein the emulated limited active torque comprises a droop torque, which is computed by applying a lead-lag filter to the difference between the rotor angular frequency and a desired angular frequency.

7. The apparatus according to claim 5, wherein the control circuitry is configured to apply a saturation to limit a low-frequency component of the active torque, thus determining the limited active torque.

8. The apparatus according to claim 5, wherein the control circuitry is configured to compute an electrical torque of the emulated synchronous machine based on the virtual currents and the rotor field, and to compute synchronous internal voltages of the emulated synchronous machine responsively to the rotor angular frequency, the rotor field, and a rotor angle of the emulated synchronous machine.

9. The apparatus according to claim 8, wherein the control circuitry is configured to compute a reactive power at the output terminals of the inverter and the rotor field of the emulated synchronous machine responsively to a voltage droop constant, a difference between an amplitude of a grid voltage of the AC power grid and a first preset value of the grid voltage, and a difference between a reactive power at the output terminals of the inverter and a second preset value of the reactive power.

10. The apparatus according to claim 8, wherein the control circuitry is configured to compute a difference voltage between the computed synchronous internal voltages and the measurements of the time-varying voltages, and to compute the virtual currents by applying a virtual impedance to the difference so as to eliminate a DC component in the virtual currents.

11. The apparatus according to any of claims 1-4, wherein the filtering circuits in the inverter have a given inductance and resistance, and wherein the model includes an equivalent stator inductance and resistance of the synchronous machine that are larger than the given inductance and resistance.

12. A method for electrical power control, comprising: applying a pulse-width modulation (PWM) drive to an inverter having input terminals for receiving a DC input voltage and output terminals for coupling to an AC power grid having three phases, and including an array of switches and filtering circuits configured to convert the DC input voltage to a three-phase AC output, including three output voltage waveforms, at the output terminals; receiving measurements of respective time- varying voltages and currents on the input and output terminals; computing a model, responsively to the measurements, that includes three virtual currents flowing in a synchronous machine that is emulated by the method, wherein the three virtual currents are associated respectively with the three output voltage waveforms; and controlling the PWM drive responsively to the three virtual currents so as to synchronize respective amplitudes, frequencies, and phases of the three output waveforms of the inverter with the three phases of the AC power grid.

13. The method according to claim 12, wherein the model comprises current control loops, which generate three control voltages for controlling the PWM drive, and wherein computing the model comprises computing, responsively to the virtual currents, reference currents for input to the current control loop.

14. The method according to claim 13, wherein computing the reference currents comprises ramping the reference currents from zero to the virtual currents upon initiation of operation of the method.

15. The method according to claim 13, wherein the current control loop comprises virtual capacitors, which are applied to filter DC components out of the three output current waveforms by modifying average voltages output from the array of switches.

16. The method according to any of claims 12-15, wherein the emulated synchronous machine has a given rotor angular frequency and rotor field, and wherein computing the model comprises computing, responsively to the virtual currents, the rotor field, and a difference between the rotor angular frequency and a grid frequency of the AC power grid, an emulated limited active torque and an emulated electrical torque, for application to the synchronous machine, thus determining a time derivative of the rotor angular frequency.

17. The method according to claim 16, wherein the emulated limited active torque comprises a droop torque, which is computed by applying a lead-lag filter to the difference between the rotor angular frequency and a desired angular frequency.

18. The method according to claim 16, wherein computing the emulated torque comprises applying a saturation to limit a low-frequency component of the active torque, thus determining the limited active torque.

19. The method according to claim 17, wherein computing the model comprises computing an electrical torque of the emulated synchronous machine based on the virtual currents and the rotor field, and computing synchronous internal voltages of the emulated synchronous machine responsively to the rotor angular frequency, the rotor field, and a rotor angle of the emulated synchronous machine.

20. The method according to claim 19, wherein computing the internal voltages comprises computing a reactive power at the output terminals of the inverter and the rotor field of the emulated synchronous machine responsively to a voltage droop constant, a difference between an amplitude of a grid voltage of the AC power grid and a first preset value of the grid voltage, and a difference between a reactive power at the output terminals of the inverter and a second preset value of the reactive power.

21. The method according to claim 19, wherein computing the model comprises computing a difference voltage between the computed synchronous internal voltages and the measurements of the time-varying voltages, and to compute the virtual currents by applying a virtual impedance to the difference so as to eliminate a DC component in the virtual currents.

22. The method according to any of claims 12-15, wherein the filtering circuits in the inverter have a given inductance and resistance, and wherein the model includes an equivalent stator inductance and resistance of the synchronous machine that are larger than the given inductance and resistance.

23. A computer software product for controlling a pulse-width modulation (PWM) drive that is applied to an inverter having input terminals for receiving a DC input voltage and output terminals for coupling to an AC power grid having three phases, and including an array of switches and filtering circuits configured to convert the DC input voltage to a three-phase AC output, including three output voltage waveforms, at the output terminals, the product comprising a tangible, non-transitory computer-readable medium in which program instructions are stored, wherein the instructions, when read by a programmable processor, cause the processor to receive measurements of respective time-varying voltages and currents on the input and output terminals, to compute a model, responsively to the measurements, that includes three virtual currents flowing in a synchronous machine that is emulated by the method, wherein the three virtual currents are associated respectively with the three output voltage waveforms, and to control the PWM drive responsively to the three virtual currents so as to synchronize respective amplitudes, frequencies, and phases of the three output waveforms of the inverter with the three phases of the AC power grid.

Description:
VIRTUAL SYNCHRONOUS MACHINES WITH IMPROVED VOLTAGE AND

FREQUENCY CONTROL

CROSS-REFERENCE TO RELATED APPLICATION

This application claim the benefit of U.S. Provisional Patent Application 62/705,636, filed July 8, 2020, which is incorporated herein by reference.

FIELD OF THE INVENTION

The present invention relates generally to electrical power generation, and particularly to inverters and methods for conversion of DC to AC power.

BACKGROUND

The electrical power system is shifting increasingly from centralized generation by large power plants to distributed generation based on renewable energy resources. Most of these renewable energy generators produce either variable-frequency AC power, as in wind turbines, or DC power, as in solar panels. Consequently, such generators require DC-AC converters, referred to as “inverters,” to feed AC power at the proper grid frequency (50 or 60 Hz) to the public utility grid. Such inverters should be carefully controlled, in ter s of output currents, frequency, and phase angle, to provide high-quality supply waveforms to consumers.

Specifically, to provide stable power on the public utility grid (also called the power grid), it is desirable that inverters operate in close synchronization with the grid frequency and phase, and should supply a clean waveform of the grid current with minimal fluctuations and noise. In recent years, it has been recognized that as inverters become more widespread, they should participate in maintaining the stability of frequency and voltage on the utility grid, and they should also help the grid to overcome various types of sudden changes and faults, similarly to synchronous generators and their prime movers.

Inverters that imitate the behavior of synchronous generators and their prime movers are known in the art as “virtual synchronous machines” (VSMs). The VSM produces a set of adjustable multi-phase output voltages, which may be coupled to an AC power grid via output filters, for the purpose of exchanging independently-controllable real and reactive power. The VSM is intended to behave like an actual synchronous generator in a conventional power plant, including its inertia, but without having moving parts.

In fact, in many respects, a VSM may behave better (for grid stability) than a synchronous generator, because its parameters are adjustable, and it can react much faster to various changes that may occur on the power grid. As an example, U.S. Patent 8,880,236, whose disclosure is incorporated herein by reference, describes a type of VSM that is known as a “synchronverter,” which is controlled by modeling a synchronous generator. The inverter in the synchronverter is controlled by representing the angular position and rotational speed of a virtual generator rotor using numerical variables. The output current of the inverter is measured and used in calculating a virtual electric torque acting on the virtual generator rotor. The rotational speed of the virtual rotor is calculated from the virtual electromagnetic torque and a parameter representing the virtual inertia of the virtual rotor. From the variables representing the angular position and rotational speed of the virtual generator rotor and the excitation current, a control signal is calculated for controlling the inverter to produce AC output corresponding to that of the virtual synchronous generator. A feedback loop is implemented in which deviation of the rotational speed of the virtual generator rotor from a reference rotational speed is detected and used to adjust the virtual drive torque.

SUMMARY

Embodiments of the present invention that are described hereinbelow provide improved virtual synchronous machines (VSMs), as well as circuits and methods for controlling such machines.

There is therefore provided, in accordance with an embodiment of the invention, electrical apparatus, including an inverter having input terminals for receiving DC input power and output terminals for coupling to an AC power grid having three phases, and including an array of switches and filtering circuits configured to convert the DC input power to three-phase AC output power, by producing three output current waveforms at the output terminals. A pulse- width modulation (PWM) generator and drivers are coupled to drive the switches so as to control respective amplitudes, frequencies, and phases of the output current waveforms. Control circuitry is coupled to receive measurements of respective time-varying voltages and currents on the input and output terminals, and to compute a model, responsively to the measurements, that includes three virtual currents flowing in a synchronous machine that is emulated by the apparatus, wherein the three virtual currents are associated respectively with the three output current waveforms, and to control the PWM generator and drivers responsively to the three virtual currents so as to synchronize the amplitudes, frequencies, and phases of the three output current waveforms of the inverter with the three phases of the AC power grid.

In some embodiments, the model includes current control loops, which generate three control voltages for controlling the PWM generator and drivers, and the control circuitry is configured to compute, responsively to the virtual currents, reference currents for input to the current control loops. In a disclosed embodiment, the control circuitry is configured to ramp the reference currents from zero to the virtual currents upon initiation of operation of the apparatus. Additionally or alternatively, the current control loop includes virtual capacitors, which are applied to filter DC components out of the three output current wa veforms by modifying average voltages output from the array of switches.

In some embodiments, the emulated synchronous machine has a given rotor angular frequency and rotor field, and the control circuitry is configured to compute, responsively to the virtual currents, the rotor field, and a difference between the rotor angular frequency and a grid frequency of the AC power grid, an emulated limited active torque and an emulated electrical torque, for application to the synchronous machine, thus determining a time derivative of the rotor angular frequency. In a disclosed embodiment, the emulated limited active torque includes a droop torque, which is computed by applying a lead-lag filter to the difference between the rotor angular frequency and a desired angular frequency. Alternatively or additionally, the control circuitry is configured to apply a saturation to limit a low-frequency component of the active torque, thus determining the limited active torque.

Further additionally or alternatively, the control circuitry is configured to compute an electrical torque of the emulated synchronous machine based on the virtual currents and the rotor field, and to compute synchronous internal voltages of the emulated synchronous machine responsively to the rotor angular frequency, the rotor field, and a rotor angle of the emulated synchronous machine. In a disclosed embodiment, the control circuitry is configured to compute a reactive power at the output terminals of the inverter and the rotor field of the emulated synchronous machine responsively to a voltage droop constant, a difference between an amplitude of a grid voltage of the AC power grid and a first preset value of the grid voltage, and a difference between a reactive power at the output terminals of the inverter and a second preset value of the reactive power. In another embodiment, the control circuitry is configured to compute a difference voltage between the computed synchronous internal voltages and the measurements of the time- varying voltages, and to compute the virtual currents by applying a virtual impedance to the difference so as to eliminate a DC component in the virtual currents.

In a disclosed embodiment, the filtering circuits in the inverter have a given inductance and resistance, and the model includes an equivalent stator inductance and resistance of the synchronous machine that are larger than the given inductance and resistance.

There is also provided, in accordance with an embodiment of the invention, a method for electrical power control, which includes applying a pulse- width modulation (PWM) drive to an inverter having input terminals for receiving a DC input voltage and output terminals for coupling to an AC power grid having three phases, and including an array of switches and filtering circuits configured to convert the DC input voltage to a three-phase AC output, including three output voltage waveforms, at the output terminals. Measurements of respective time-varying voltages and currents on the input and output terminals are received. A model is computed, responsively to the measurements, that includes three virtual currents flowing in a synchronous machine that is emulated by the method, wherein the three virtual currents are associated respectively with the three output voltage waveforms. The PWM drive is controlled responsively to the three virtual currents so as to synchronize respective amplitudes, frequencies, and phases of the three output waveforms of the inverter with the three phases of the AC power grid.

There is additionally provided, in accordance with an embodiment of the invention, a computer software product for controlling a pulse-width modulation (PWM) drive that is applied to an inverter having input terminals for receiving a DC input voltage and output terminals for coupling to an AC power grid having three phases, and including an array of switches and filtering circuits configured to convert the DC input voltage to a three-phase AC output, including three output voltage waveforms, at the output terminals, the product including a tangible, non-transitory computer-readable medium in which program instructions are stored. The instructions, when read by a programmable processor, cause the processor to receive measurements of respective time- varying voltages and currents on the input and output terminals, to compute a model, responsively to the measurements, that includes three virtual currents flowing in a synchronous machine that is emulated by the method, wherein the three virtual currents are associated respectively with the three output voltage waveforms, and to control the PWM drive responsively to the three virtual currents so as to synchronize respective amplitudes, frequencies, and phases of the three output waveforms of the inverter with the three phases of the AC power grid.

The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 is a block diagram that schematically illustrates an electrical power generation system incorporating a VSM, in accordance with an embodiment of the invention;

Fig. 2 is a block diagram that schematically illustrates a VSM controller, in accordance with an embodiment of the invention;

Fig. 3 is a block diagram that schematically shows details of a steady-state power limitation block in the VSM controller of Fig. 2, in accordance with an embodiment of the invention; Fig. 4 is a block diagram that schematically illustrates current control loops, in which all the signals are obtained from Park transformations and are complex valued, in accordance with an embodiment of the invention;

Fig. 5 is a block diagram that schematically shows details of the current control block in the VSM controller of Fig. 2, based on the conceptual diagram of Fig. 4, and in accordance with an embodiment of the invention; and

Fig. 6 is a block diagram that schematically shows details of a virtual capacitor in the VSM controller of Fig. 2, in accordance with an embodiment of the invention.

DETAILED DESCRIPTION OF EMBODIMENTS

OVERVIEW

As long as inverters provide only a small fraction of the power on the public grid, fluctuations in their active power, reactive power, local voltage, frequency and phase can easily be compensated for by the conventional synchronous generators that provide most of the grid power. As renewable energy sources become more prevalent, however, these fluctuations can lead to unacceptable variations in power provided to consumers. Although VSMs can, in principle, emulate the behavior of synchronous generators and provide more stable AC output power, precise control of the VSM remains a challenge.

For example, the inventors have found that the output currents of a synchronverter are excessively sensitive to grid voltage measurement errors and to delays that appear while taking measurements, processing data, and generating PWM signals. These errors cause distortions of the grid currents and unsteady amplitude, especially when the synchronverter works at relatively low power, and can result in loss of synchronization, leading to disconnection.

Embodiments of the present invention that are described herein use a model of the VSM that includes virtual current control loops to reduce the effect of measurement errors and delays. Virtual capacitors in the model reduce the DC component in the actual output currents generated by the inverter. The disclosed control model also includes a mechanism for ensuring a smooth start-up of the VSM, in order to protect the inverter and avoid disrupting the grid during the start up period.

The VSM model used in embodiments of the present invention emulates the frequency droop functionality of a synchronous generator, which causes the active torque of the generator model to change in order to compensate for frequency shifts. The model uses lead-lag filtering of the droop signal to achieve a moderate droop constant at steady state (thus, avoiding a power surge, which is difficult to sustain, if the grid frequency deviates from its nominal value for a long time), while still maintaining a higher droop constant for fast changes of the grid frequency, thus providing the stabilizing effect of the higher droop constant.

The VSM model used in embodiments of the present invention also emulates the voltage droop functionality of a synchronous generator, which causes the field current of the generator model to change in order to compensate for voltage deviations from the desired local voltage.

The methods and control model provided by the embodiments described herein can thus be applied in making and operating synchronverters that are robust against voltage sensing errors, grid voltage imbalance, and distortion. These methods protect the inverter and the grid against extreme operating conditions. Synchronverters that operate in accordance with these embodiments can be integrated readily into the power grid, as well as into high-quality private electrical supply grids.

To implement these features, the disclosed embodiments provide electrical apparatus comprising an inverter, which has input terminals for receiving a DC input voltage and output terminals for coupling to a three-phase AC power grid. The inverter comprises an array of switches and filtering circuits for converting the DC input voltage to a three-phase AC output. A pulse- width modulation (PWM) generator and drivers control the switches so as to produce the desired amplitudes, frequencies, and phases of the three output voltage waveforms at the output terminals of the inverter legs, i.e., the voltages before the output filters. The control circuitry receives measurements of respective time-varying voltages and currents on the output terminals and based on these measurements, models three virtual currents flowing in the VSM. These virtual currents are limited to protect the inverter, and after this limitation they become reference currents.

The current control part of the algorithm controls the PWM generator and the drivers so that the output currents of the inverter become nearly equal to the reference currents. Thus, the inverter behaves according to the VSM model of the synchronous generator.

SYSTEM DESCRIPTION

Fig. 1 is a block diagram that schematically illustrates an electrical power generation system 20 incorporating a VSM, in accordance with an embodiment of the invention. System 20 comprises a DC power source 22 (such as an array of solar panels in the pictured example), which is connected to provide a DC input voltage VDC to the input terminals of an inverter 24.

Inverter 24 comprises an array of switches 30 and filtering circuits, including inductors 32 and capacitors 34 in an LCL filter configuration. Inductors 32 are each characterized by inductance Ls and series resistance Rs, while capacitors 34 have capacitance Cs, which is chosen so that the LCL filters have a resonant frequency higher than the nominal grid frequency co n but well below the switching frequency. Inverter 24 converts the DC input voltage to a three-phase AC output, including three output current waveforms, with time-varying currents i a , i b , and i c , at the output terminals of the inverter. The output terminals are connected to the AC grid by inductors 36, with inductance L f and series resistance R f , as well as circuit breakers 38. The grid voltages are v ga , v gb , and v gc .

A pulse-width modulation (PWM) generator and drivers 26 drive switches 30 so as to control the respective amplitudes, frequencies, and phases of the average voltage waveforms g^, gj) and ' g c ' . These averages are computed over each switching period, which is much shorter than the period of the grid voltage. PWM generator and drivers 26 typically comprise suitable hardware logic and amplifier circuits, as are known in the art. Under the control of PWM generator and drivers 26, switches 30 generate respective average voltages g^, g^ and g^., which are filtered by the LCL filters to smooth the waveforms and reduce the ripple in the output terminal voltages v a , Vb, and Vc and the output terminal currents ib, and / ' , of the three AC output phases.

Control circuitry 28 receives measurements of v a , Vb, v c and i a , ib, ic and applies these measurements in modeling corresponding virtual currents / ' , 7G „, i ΊIΊ, i, and ί ΊIΊ,< flowing in a model of a synchronous machine that inverter 24 is to emulate. Based on this synchronous machine model, control circuitry 28 outputs respective signals g a , g b , and g c , which are the desired values for g^, 9 b and g^. The PWM generator produces the logical signals that are applied via the drivers to switches 30. As a result of correctly generated PWM signals, the voltages g^, g ~ b and g^ will closely match the signals g a , g b , and g c , and as a consequence, the currents i a , i b , and i c will closely match the virtual currents i virt ,a, i v ,b and i vin ,c.

Control circuitry 28 adjusts the control signals g a , g b , and g, as necessary to synchronize the amplitudes, frequencies, and phases of the three output waveforms of inverter 24 with the three phases of the AC power grid. The novel model that is used by control circuitry 28 and its application in generating and adjusting the control voltages are presented are described in detail hereinbelow. For convenience in the description below and in the figures, these voltages and currents are represented collectively by the vectors v = ( v a , V b , v c ), i = (i a , i t , ic), and g = (g a , g b , g c

Control circuitry 28 typically comprises a programmable processor, such as a general- purpose microprocessor or a digital signal processor (DSP), with suitable interfaces for receiving and outputting signals from and to inverter 24 and PWM generator and drivers 26, as well as other control inputs. The processor performs these functions under the control of suitable software program instructions. The software is typically stored in tangible, non-transitory computer- readable media, such as optical, magnetic, or electronic memory media. Alternatively or additionally, at least some of the functions of control circuitry 28 may be carried out by hardware logic circuits, which may be hard-wired or programmable.

Inverter 24 and PWM generator and drivers 26 are presented here by way of example, to demonstrate the application and operation of control circuitry 28. Further details of the design and operation of inverter 24 and PWM generator and drivers 26, as well as modeling and control of these elements to emulate a synchronous machine, are described in sections I, II and III of the specification of the above-mentioned U.S. Patent 8,880,236. Alternatively, control circuitry 28 may be applied, mutatis mutandis, in controlling inverters of other types that are known in the art. All such applications of control circuitry 28 are considered to be within the scope of the present invention.

VSM CONTROL USING MODELED CURRENTS

Fig. 2 is a block diagram that schematically illustrates the VSM control algorithm that is implemented by control circuitry 28, in accordance with an embodiment of the invention. The core of this algorithm is a model 40 of the synchronous machine that is emulated by inverter 24, in which three virtual currents i virt = (i virt a> i virt, b> i virt.c ) in the VSM give rise to the modeled electrical torque T e of the VSM, and also serve to generate reference currents for the current control loops, as described in detail below.

To generate i virt , model 40 applies the difference between the internal synchronous voltage e = (e a , e b , e c ) in the model and the measured voltage v = (v a , v b , v c ) on the terminals of filter capacitors 34 of inverter 24 to a virtual impedance 42 (rather than to the actual filter impedance of inverter 24). Virtual impedance 42 consists, on each phase, of an inductor L g in series with a resistor R g and a capacitor C g . Here L g and R g represent the equivalent stator inductance and resistance of a synchronous generator, while C g filters out DC components from the virtual currents. (The value C g is large enough so that at the grid frequency and at higher frequencies, its effect is negligible.) Thus, the virtual current in phase a, denoted i virt,a^ and the charge on the corresponding capacitor C g , denoted y„, satisfy the differential equations: Phases b and c behave similarly. Because L g and R g are much larger than Ls and Rs (Fig. 1), the use of virtual impedance 42 reduces the effect of voltage measurement errors and grid voltage distortions on virtual currents i virt , relative to models based on the actual currents flowing in the inverter. Furthermore, the virtual currents are insensitive to control-related delays that are inherent in the PWM process.

Based on the virtual currents, a torque generator 44 computes the electrical torque T e , according to the formula:

This formula uses state variables of the VSM, namely the rotor angle Q, the rotor current if, and the virtual currents Here M/ is the peak mutual inductance between the rotor winding and one stator winding and m = ^/3/2 Mf. The following notation is used:

In the formula above and in the description that follows, are the d and q components of the vector / V! v(d,q,0), which is generated by applying the Park transformation (/(()) to the virtual current vector i Virt (a.,b,c):

The electrical torque T e computed by torque generator 44 passes through a low-pass filter 46 and is then subtracted from the limited active torque G / . Changes in the value of Ti emulate variations in the active torque due to changing operating conditions of system 20, as described in greater detail hereinbelow. The angular frequency w of the rotor of the VSM varies as a function of this difference between limited active torque Ti and electrical torque T e , depending on the inertia J that is attributed to the emulated rotor:

The value of J is selected depending upon the desired rate of response of the angular frequency w of inverter 24 to changes in operating conditions. Based on this relation, a saturating integrator 48 computes the instantaneous angular frequency w . A further integration stage 50 gives the instantaneous rotor angle 0, which is applied in the various Park transformations carried out by control circuitry 28.

Given the angular frequency, rotor angle, and rotor magnetic field (inductance times current), a multiplier 52 computes the synchronous internal voltages e = (e a , e b , e c ) of the three phases of the VSM:

The measured voltages v are subtracted from these synchronous internal voltages to give a difference voltage, which are inputs to the three virtual impedances 42 as explained above.

To find the virtual rotor field mi f , a multiplier 54 computes the reactive power output Q from inverter 24:

Q = i dVq - i q v d .

During the initial synchronization process upon startup of inverter 24, a switch Si inputs the virtual current / V!rt to multiplier 54. Subsequently, the switch inputs the actual output current i. The computed power is filtered by a low-pass filter 56 and is then subtracted from the preset reactive power Q set -

The virtual rotor field is also affected by voltage droop, i.e., by the difference between the preset output voltage level v set and the actual amplitude of the voltages v. An amplitude detector 60 detects the amplitude of the voltages v, which is subtracted from v set - The difference is multiplied by a selected voltage droop coefficient D q in a multiplier 62, and the result is added to Q set . Optionally, a secondary voltage control block 64 may compute an additional incremental voltage 5V for addition to v set , but this function can be neutralized in Fig. 2 by opening switch S3.

The virtual rotor current if is related to the reactive power and voltage droop by the equation:

Here K m is a large constant. A saturating integrator 58 integrates over this equation in order to compute the emulated rotor field mi f for input to torque generator 44 and multiplier 52. To find the limited active torque Ti, control circuitry 28 begins by computing the nominal active torque T m that will be needed to achieve, at equilibrium, the preset power values P se t and Qset, in a torque computation block 66. This computation uses the nominal value of the grid voltage, V r , and the nominal grid frequency co n :

In addition, lead-lag filter 68 takes into account the effect of frequency droop in generating a simulated droop torque T d , which is added to the nominal active torque T m . In physical synchronous generators, droop torque is generated to compensate for deviations in the angular frequency of the generator, for example due to increased load on the power grid. Control circuitry 28 accordingly computes the virtual droop torque based on the current difference between the desired angular frequency co set and the angular frequency w of the virtual rotor in model 40. Optionally, a secondary frequency control block 72 may compute an additional incremental angular frequency dk> for addition to w set , but this function can be neutralized in Fig. 2 by opening switch S2. Thus, in the present case, co set is equal to the nominal angular frequency co n .

A lead-lag filter 68 is applied to the frequency difference co set - co in order to help stabilize the grid frequency while limiting the output power of inverter 24, in order to provide the droop torque. The operation of filter 68 can be expressed as follows using Laplace transforms (indicated by a hat above the symbol of the signal):

In this expression, i d is on the order of 1 sec, D p > 0 is the frequency droop constant for low frequencies, and aD p is the frequency droop constant for high frequencies, with a > 1. The addition of this emulated droop torque to model 40 allows inverter 24 to provide high additional current for short periods of time in order to compensate for frequency deviations, followed by lower added currents over longer periods in order to avoid overwhelming the available generation or storage capacity of system 20.

To protect inverter 24 from overload, a steady-state power limitation block 70 is applied to the sum of the nominal and droop torques. In the absence of block 70, the active torque Ti would simply be the sum of T m + T d . Block 70 limits the steady-state value of Ti to match the capacity of inverter 24, while still permitting fast transients in the torque to maintain stability when needed.

Fig. 3 is a block diagram that shows details of steady-state power limitation block 70, in accordance with an embodiment of the invention. Block 70 splits the signal T m + T d into two complementary channels by using a low-pass filter 80. Low-pass filter 80 typically has a time constant x w on the order of 1 sec. A saturating limiter 82 is applied only to the low-pass channel. The two channels are added to give the limited active torque Ti.

Returning now to Fig. 2, the virtual currents / V!rt (a,b,c) flowing in model 40 are used in computing reference currents / re /(d,q,0) for input to a current control block 76, which generates the control voltages g using current control loops with virtual capacitors 78, as described below. Prior to input to current control block 76, however, a current ramp-up and limitation block 74 is applied to make sure that the maximal current of the inverter switches 30 is not exceeded. Current ramp- up and limitation block 74 computes the Park transform / V!rt (d,q,0) of the currents (a,b,c) before applying the limitation to i virt (d,q,0), in order to maintain the clean sinusoidal shape of the output currents. The same block 74 also limits the rate at which / re /(d,q,0) ramps up when inverter 24 starts operation in order to prevent possible damage to the inverter and reduce interference on the power grid due to current spikes. For example, i re f may ramp up to i v over the course of a few seconds. The actual, measured grid currents, Park-transformed to /(d,q,0), are then subtracted from the reference currents /, Y:/( d,q,0) to generate error currents s(d,q,0) for input to current control loop 76.

Fig. 4 is a block diagram that schematically shows a current control loop 83, comprising a representation of an inverter circuit 86 (labeled as the plant P in the figure), a dq current controller 88, and virtual capacitors 87, in accordance with an embodiment of the invention. This diagram shows only Park-transformed variables, wherein the signals are represented as complex signals, with the d component being the real part, and the q component being the imaginary part. The current tracking error e is the difference between the reference current i re f and the actual current i. Current controller 88 is of the proportional-integral type, with parameters K p and Ki, and causes the error e to become very small in steady-state operation. The sensitivity S represents the transfer function from the reference current i re f to the error e.

Fig. 4 illustrates conceptual features of the control loop that are implemented in the detailed realization of dq current controller 88 that is shown in Fig. 5. In particular, the influence of the grid voltage v on the output currents is largely cancelled by adding (at the left side of the figure) the signal v to obtain E°, and the influence of the processing delay and PWM delay is largely cancelled by multiplying E° by the phase correction e ](p in a phase correction block 84. These features help to increase the accuracy of the current control loop. Current control block 76 comprises phase correction block 84 and current controller 88. A delay block 85 represents the effect of the phase shift -cp and the delay t between the control voltages g that are output by control circuitry 28 and the corresponding average voltages g that are output by switches 30 in inverter 24.

Fig. 5 is a block diagram that schematically shows details of current control block 76, in accordance with an embodiment of the invention. Block 76 comprises three current loops, which receive respective d, q and 0 components of the error currents s(d,q,0) and output the desired output voltages E°(d,q,0). Each loop includes an integrator block 90 with a coefficient K;, and a proportional block 92 with a coefficient Ro. In addition, the d and q loops are linked by proportional blocks 94, with gain OJL s . Various choices of the block coefficients are possible. The choices may be based, for example, on a selected current loop bandwidth ro b > ro n , such that Ki = L s o)l and R 0 = 2 a) b L s - R s .

The current loop outputs are summed with the corresponding components of the measured grid voltages v(d,q,0), including any voltage measurement errors r | (d,q,0), as shown above in Fig. 4. An inverse Park transformation block 96 transforms the resulting output voltages £°(d,q,0) back to (a,b,c) coordinates (E a , E b , E c ). The transformation is performed, however, with the phase angle corrected to q+f. The additional phase correction is given by f = wt, wherein t is the delay between the control voltages g that are output by control circuitry 28 and the corresponding average voltages g that are output by switches 30 in inverter 24. Inverse Park transformation block 96 thus compensates for the effect of this delay in the operation of inverter 24.

Fig. 6 is a block diagram that schematically shows details of virtual capacitor 78 at the output of current control block 76, in accordance with an embodiment of the invention. Although only the E a output is shown in Fig. 5 for the sake of simplicity, the E b and E c outputs are treated in similar fashion. The capacitance C v irt of the virtual capacitor blocks DC components out of the output current i a by becoming charged with a DC voltage that is then subtracted from E a . The remaining voltage g a is the control voltage to PWM generator and drivers 26, which drive switches 30. (These components are represented collectively in Fig. 6 by block 30.)

A virtual resistance R v irt, in parallel with Cvirt, normally has a high value, for example 1 kC, so that the current through it is insignificant. During start-up of inverter 24, however, R v irt may be reduced to zero, and then ramps up to the high value over a few seconds in order to reduce the effect of current transients in inverter 24.

In the above description, control circuitry 28 applies a specific combination of functions in emulating a synchronous machine as to generate control voltages for PWM generator and drivers 26 that will facilitate stable, robust operation of inverter 24. In alternative embodiments, however, some of the functions of these features may be omitted, and other features may be added. For example, different models may be applied in generating the reference current inputs to current control block 76, and different sorts of current control loops may be used in block 76. As another example, other sorts of filters and limiting blocks may be used in conjunction with model 40 for handling changes in frequency and torque and for controlling start-up of inverter 24. Further variants, as well as explanation of various features of the present invention, are presented in the above-mentioned provisional patent application. All such alternative embodiments are considered to be in the scope of the present invention.

It will thus be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and subcombinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art.