WAFER PLACEMENT TABLE

WIPO Patent Application WO/2024/047857

A1

In the present invention, an upper base material 20 of a wafer placement table 10 is provided with a ceramic base material 21 that has an electrode 22 embedded therein, the upper base material 20 having a wafer placement surface 21a on the upper surface of the ceramic base material 21. A lower base material 30 is disposed on the lower-surface side of the upper base material, the lower base material 30 being provided with refrigerant flow paths 35. Through-holes 36 penetrate through the lower base material 30 in the up-down direction. Protrusions 38 are provided in the form of dots on the entirety of the upper surface of the lower base material 30, the protrusions 38 being in contact with the lower surface of the upper base material 20. A heat dissipation sheet 40 has protrusion insertion holes 44 into which the protrusions 38 are inserted, the heat dissipation sheet 40 being disposed between the upper base material 20 and the lower base material 30 in a compressed state. Threaded holes 24 are provided in the lower surface of the upper base material 20 at positions that face the through-holes 36, and screw members 50 are inserted into the through-holes 36 from the lower surface of the lower base material 30 and threaded into the threaded holes 24.

KUNO TATSUYA (JP)
USAMI TARO (JP)
ISHIKAWA MASAKI (JP)

PCT/JP2022/033051

March 07, 2024

September 02, 2022

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NGK INSULATORS LTD (JP)

H01L21/683

WO2018038044A1

2018-03-01

JP2021150329A	2021-09-27
JP2022119239A	2022-08-17
JP2008130609A	2008-06-05

ITEC INTERNATIONAL PATENT FIRM (JP)

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