CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of US Application No. 62/750,003, filed October 24, 2018, which is incorporated by reference.

TECHNICAL FIELD

[0002] This specification relates to battery charging.

BACKGROUND

[0003] A rechargeable battery is a type of electrical battery which can be charged, discharged into a load, and recharged many times. A battery charger is a device used to put energy into a rechargeable battery by forcing an electric current through it.

SUMMARY

[0004] In existing battery charging power architectures inside the battery-powered devices such as smart phones, power from a wired power source and a wireless power source may be converted by a battery charger, e.g., a buck converter, to battery voltage. The cables for wired charging and coils for wireless charging may have current limits, requiring a higher voltage to increase the charging power once the current limit of the cable or coil is reached. However, a higher input voltage to the battery charger may decrease charger efficiency, since many step-down DC-DC converters have reduced efficiency as the difference between input voltage and output voltage increases. An optional parallel charger can be added to spread the heat among two converters, but the total heat is still a problem since charger and parallel charger both have a similar efficiency.

[0005] The disclosure below discusses an improved power architecture with the versatility to charge a battery with high efficiency from different types of power sources and with a significant range of supply voltages. In some implementations, the power architecture includes a switched capacitor converter in series with the battery charging circuitry, which can include a step-down DC-DC converter (e.g., a buck regulator). The switched capacitor converter can provide a voltage that is a fraction of (e.g., is less than) the supply voltage. The switched capacitor converter may be an inductor-less power converter that enables applications to be powered with high efficiencies, e.g., ninety-seven percent or higher, while requiring less total area compared to other power conversion solutions. When operating at a fixed fifty percent duty cycle, the switched capacitor converter may half the input voltage and provide flat efficiency over a wide range of current delivered to the output, which may be twice the current input. A bypass mechanism is provided so that the switched capacitor converter and the voltage reduction it provides can be selectively bypassed depending on the supply voltage used.

[0006] The power architecture also includes control circuitry that engages or disengages the bypass, depending on the supply voltage of a power source. For example, when charging a lithium-ion battery with a typical voltage range of roughly 2.7 - 4.2 V, if a nominal 5 V power input is supplied, e.g., from a USB-C or earlier USB source, the bypass is engaged so that the battery charger circuitry receives the supply voltage without being decreased by the switched capacitor converter. If a supply voltage is 9V or greater, however, such as with a USB-PD or USB-PPS power source, the bypass is engaged so that the step-down converter in the battery charging circuitry needs to decrease the voltage less than without the switched capacitor converter. For example, once the supply voltage is more than twice the voltage on the battery being charged, the bypass is disengaged so that the switched- capacitor converter will perform the initial voltage step down, e.g., at a

predetermined ratio of 2:1 , which significantly greater efficiency that the buck regulator in the battery charging circuitry can perform. This converts the supply voltage to an intermediate voltage much closer to the ultimate battery voltage, allowing the buck regulator in the battery charging circuitry to operate at a very high efficiency, e.g., with a duty cycle of 80% or more, or 90% or more, or even with a linear or low drop-out mode for even less inefficiency.

[0007] The device can use the same power path circuitry, e.g., the same switched capacitor converter, bypass, and battery charging circuitry, can be used to charge a battery using any of multiple different power sources having different characteristics, e.g., different source voltages, different current capabilities, and/or different transmission types (e.g., wired or wireless). The device may include a power multiplexer to select from among multiple different power sources, e.g., a wired power source and a wireless power source. The wired power source may itself allow coupling the device with different types of power sources to be coupled,

[0008] For given input voltage from wired charging, for example 9 V, a switched capacitor converter can convert 9 V to 4.5 V with an efficiency of ninety-eight percent. Then the charger converts 4.5 V to battery voltage, e.g., roughly 2.7V - 4.2V over the source of charging a lithium-ion battery, with an efficiency of ninety-six percent. In this example, the switched capacitor converter brings the supply voltage (9 V) to an intermediate voltage (e.g., 4.5 V) that is much closer to battery voltage. This, in turn, allows a buck converter or other converter in the battery charging circuitry to operate with very high efficiency, such as a duty cycle of 80%, 90% or higher, or even in a linear or low-drop out form that is very efficient due to the much smaller difference between the intermediate voltage and the battery voltage for charging. This leverages the strengths and efficiency of the switched capacitor converter to decrease the voltage more efficiently than buck converters. The total wired charging efficiency may be ninety-four percent, compared to ninety percent for the existing architecture, and under the same loss, the charging speed can be increased by approximately fifty percent.

[0009] For wireless charging, the input current may be limited to one amp due to coil limitations. The amount of current allowed to be induced in many wireless power receiving coils is limited to roughly 1 A due to the heat generated in the receiving coil. In some implementations, most of the heat and power loss for wireless charging is from the coil conduction loss and by double the coil receiving voltage. The discussion below describes how to cut the coil current in half and quarter the coil conduction losses. Therefore, in this case, the voltage used in a wireless power transmitter and/or the wireless power receiver can be roughly 15 V, the switched capacitor converter can then convert fifteen volts to 7.5 volts, and the charger can converter 7.5 volts to battery voltage much more efficiently than converting a 15 V signal to battery voltage. The wireless charging receiver efficiency may increase from ninety percent with existing architecture to ninety-four percent with the proposed architecture because, for same conduction loss, the output power is increased with a higher output voltage. The charger efficiency may also increase from ninety percent to ninety-two percent because the input voltage of the charter is reduced from nine volts to 7.5 volts. The total wireless charging efficiency may increase from eighty percent to eighty-five percent, and the charging speed can also increase by about fifty percent.

[0010] The improved power architecture is also compatible with legacy wired charger or wireless charger. With the addition of a bypass switch in parallel with a switched capacitor converter, the system is able to activate the bypass switch when the device is connected to a legacy wired charger or wireless charger powered by a legacy charger. With the bypass active, the system may not activate the switched capacitor converter during the charging process. The improved power architecture may be referred to as a SMART (Switched-capacitor Multi-step Adaptive-power Rapid-charge Technology) Power Management architecture.

[0011] According to an innovative aspect of the subject matter described in this application, a device includes battery charging circuitry configured to charge a battery; a power multiplexer having multiple power inputs and a power multiplexer output, the power multiplexer being configured to select from among the multiple power inputs and provide power from the selected power input at the power multiplexer output; a switched-capacitor voltage divider, the switched-capacitor voltage divider being configured to receive an input voltage and provide an output voltage that is a fraction of the input voltage; a bypass configured to selectively bypass the switched-capacitor voltage divider; and control circuitry configured to select between engaging and disengaging the bypass, where the power multiplexer, switched-capacitor voltage divider, and bypass are arranged such that each of the multiple power inputs, when selected by the power multiplexer, can be used to charge the battery (i) in a first mode with current passing through the switched- capacitor voltage divider with the bypass disengaged, and (ii) in a second mode with current passing through the bypass with the bypass engaged. [0012] These and other implementations can each optionally include one or more of the following features. The switched-capacitor voltage divider is configured to receive the input voltage from the power multiplexer output and to provide the output voltage to the battery charger circuitry. The bypass is configured to provide voltage from the power multiplexer output to the battery charger circuitry. The power multiplexer, switched-capacitor voltage divider, and bypass are arranged such that each of the multiple power inputs, when selected by the power multiplexer, can be coupled to the battery charging circuitry (i) through the switched-capacitor voltage divider with the bypass disengaged, and (ii) through the bypass when the bypass is engaged. The power multiplexer output is coupled to the battery charging circuitry, and wherein the battery charging circuitry provides power to the battery through the switched-capacitor voltage divider or the bypass. The switched-capacitor voltage divider is configured to receive the input voltage from the battery charging circuitry and provide the output voltage through a coupling with the battery. The bypass is configured to provide voltage from the battery charging circuitry to a coupling with the battery. The control circuitry is configured to select between engaging and disengaging the bypass based on (i) a type of power source coupled to the selected power input or (ii) a voltage provided using the selected power input. The switched- capacitor voltage divider is configured to scale the input voltage from the power multiplexer output to generate the output voltage that is a fixed fraction of the input voltage.

[0013] The switched-capacitor voltage divider is configured to provide an output voltage that is substantially half of the input voltage from the power multiplexer output. The control circuitry is configured to engage the bypass when a voltage of the selected power input is less than double the voltage of a battery being charged by the battery charging circuitry. The control circuitry is configured to disengage the bypass when a voltage of the selected power input meets or exceeds a voltage threshold that at least double the voltage of a battery being charged by the battery charging circuitry. The battery charging circuitry comprises a switching step-down DC-DC converter. The battery charging circuitry is configured to operate the switching step-down DC-DC converter in a non-switching linear or low-drop out mode when voltage provided by the switched-capacitor voltage divider or bypass is within a threshold difference from the voltage of a battery being charged by the battery charging circuitry. The device is a mobile phone. The device includes a battery. The battery is a lithium-based battery. The battery charging circuitry is configured to charge the lithium-based battery according to a charging profile that includes charging at one or more constant current levels and one or more constant voltage levels. At least one of the multiple power inputs is configured to receive power from a wired power source, and at least one of the multiple power inputs is configured to receive power from a wireless power source. The device further include a wireless power receiving coil. The wireless power receiving coil is coupled to the at least one of the multiple power inputs configured to receive power from a wireless power source through a rectifier.

[0014] The bypass is integrated into switched-capacitor voltage divider, such that engaging the bypass involves operating the circuitry of the switched-capacitor voltage divider in a non-switching mode. The power multiplexer is configured to provide power from only one of the multiple inputs to the power multiplexer output. The power multiplexer is configured to selectively provide, at the power multiplexer output, a combination of power received concurrently from two or more of the power inputs. The multiple power inputs include (i) a wired power input configured to be coupled to a wired power source and (ii) a wireless power input configured to receive power obtained from a wireless power source through inductive coupling of a wireless power receiving coil. The device includes control circuitry configured to negotiate with the wired power source and/or the wireless power source to obtain voltages at the wired power input and the wireless power input that are substantially equal. The power multiplexer is configured to provide, at the power multiplexer output, current that comprises a sum of current from the wired power input and the wireless power input. The device is configured to charge a lithium-ion battery using each of a nominal 5V USB voltage, a nominal 9V USB-PD voltage, and an adjustable USB-PPS voltage. The control circuitry is configured to (i) engage the bypass to charge the lithium-ion battery using the nominal 5V USB voltage, (ii) disengage the bypass to charge the lithium-ion battery using the nominal 9V USB- PD voltage, and (iii) disengage the bypass to charge the lithium-ion battery using the adjustable USB-PPS voltage. The device is configured to charge a lithium-ion battery from power from a wireless charging power source causing a wireless receiver of the device to generate any rectified voltage in the range of 5 V to 15 V, wherein the control circuitry is configured to disengage the bypass when the rectified voltage is 9 V or higher.

[0015] The switched-capacitor voltage divider is configured to provide an output voltage that is substantially half of the input voltage from the power multiplexer output. The control circuitry is configured to determine that a power source coupled to one of the power inputs is programmable; determine a voltage of the battery; determine a requested voltage level based on the voltage of the battery, wherein the requested voltage level is more than double the voltage of the battery but does not exceed double the voltage of the battery by more than a threshold amount; and negotiating a voltage output level for the power source at the requested voltage level. The battery charger circuitry comprises a switching step-down DC-DC converter configured to operate at a varying duty cycle. The control circuitry is configured to negotiate a voltage level of a power source coupled to one of the power inputs such that the battery is charged with the switching step-down DC-DC converter operating with a duty cycle of greater than 80% during a bulk charging phase of charging the battery. The control circuitry is configured to negotiate incremental increases in a voltage provided by a programmable power supply as voltage of the battery increases during charging. The control circuitry is configured to negotiate the incremental increases in the voltage provided by the programmable power source such that, over at least a portion of the charging cycle for the battery, the voltage provided by the programmable power source is maintained at more than double the voltage on the battery as the battery voltage increases during charging and the bypass remains disengaged. The control circuity is configured to negotiate a voltage provided by a power source configured to provide power at any of multiple increments. The control circuitry is configured to determine and request power at the increment immediately above double the current voltage applied to the battery. The device is configured such that the bypass is engaged when the device is powered off.

[0016] The details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIGS. 1-3 illustrate example power architectures for a battery-powered device during charging by a power supply.

[0018] FIG. 4 illustrates an example power charging sequence for a battery- powered device during wireless charging.

[0019] FIG. 5 illustrates an example architecture for a bypass and a switched- capacitor voltage divider.

[0020] FIG. 6 illustrates an example architecture for battery charger.

[0021] FIGS. 7 and 8 illustrate example architectures for a power multiplexer.

[0022] FIG. 9 illustrates an example model for a power multiplexer.

[0023] FIG. 10 is an example of a computing device and a mobile computing device.

[0024] Like reference numbers and designations in the various drawings indicate like elements.

DETAILED DESCRIPTION

[0025] FIG. 1 illustrates an example power architecture 100 for a battery-powered device 102 during charging by a power supply. The power architecture 100 includes a battery-powered device 102 that is being charged by a wired power supply 104 or a wireless power supply 106 that interfaces with the battery-powered device 102 through a wireless transmitter 108 or both. The battery-powered device 102 uses the power from the wired power supply 104 or the wireless power supply 106 to charge the battery 1 10 of the battery-powered device 102.

[0026] In the example shown in FIG. 1 , the battery-powered device 102 may be connected to the wired power supply 104 through a charging cable. The power supply 104 may be programmable and be configured to provide power 1 12 at different voltage levels. For example, the power supply 104 may be able to provide power at eight volts or six volts depending on any requests received from the battery-powered device 102. In some implementations, the battery-powered device 102 may request that the power supply 104 provide power at twice the current voltage of the battery 1 10. In some implementations, the power supply 104 is a USB power delivery power supply that may not be programmable. The power supply 104 may provide power at a constant voltage such as nine volts.

[0027] The power multiplexer 1 14 receives the power 1 12 from the power supply 104 through a cable. The controller 1 16 may determine that the power multiplexer 1 14 is receiving power from a wired power supply. In some implementations, the controller 1 16 may communicate directly with the power supply 104 to request a particular voltage from the power supply 104. If the power supply 104 is

programmable then the power supply 104 is able to respond. If the power supply 104 is a constant voltage power supply, then the power supply 104 is unable to respond to the controller 1 16. Based on the controller 1 14 identifying the power supply as a programmable power supply or as a non-programmable USB power delivery power supply, the controller may ensure that the bypass 1 18 is inactive and power 120 flows from the power multiplexer 1 14 to the switched-capacitor voltage divider 122. The switched-capacitor voltage divider 122 provides power 124 to the battery charger 126. In some implementations, the power 124 that the switched- capacitor voltage divider 122 provides to the battery charger 126 is at a lower voltage than the power 120 received from the power multiplexer 1 14. For example, the voltage of the power 120 may be at eight volts and the power 124 may be at four volts. The battery charger 126 receives the power 124 and charges the battery 1 10.

[0028] The battery-powered device 102 may interact with the wireless power supply 106 through a wireless transmitter 108. The wireless transmitter 108 and the wireless receiver 127 are coupled through an inductive coupling 128 that transfers power from the power supply 106 to the battery-powered device 102. In some implementations, the number of wire turns in the wireless receiver 127 may be higher such that a higher voltage is induced in the wireless receiver 127 which results in a lower charging coil current and lower resistive losses. In some implementations, the power supply 106 is a USB power delivery device that provides power 130 at a constant voltage. For example, the power supply 106 may provide power 130 at fifteen volts.

[0029] The power multiplexer 1 14 receives the power 130 from the wireless receiver 127. The controller 1 16 may determine that the power multiplexer 1 14 is receiving power from a wireless power supply. Based on the controller 1 14 identifying the power supply 106 as being connected through a wireless interface, the controller may determine the voltage level of the power 230 or a type of the power supply 106. If the controller determines that the voltage level of the power 230 meets a threshold (e.g., fifteen volts) or is a USB power delivery device, then the controller 1 14 may ensure that the bypass 1 18 is inactive and power 132 flows from the power multiplexer 1 14 to the switched-capacitor voltage divider 122. The switched-capacitor voltage divider 122 provides power 134 to the battery charger 126. In some implementations, the power 134 that the switched-capacitor voltage divider 122 provides to the battery charger 126 is at a lower voltage than the power 120 received from the power multiplexer 1 14. For example, the voltage of the power 120 may be at eight volts and the power 134 may be at four volts. The battery charger receives the power 134 and charges the battery 1 10.

[0030] In some implementations, the bypass 1 18 and the switched-capacitor voltage divider 122 may be integrated onto one integrated circuit. In some implementations, the bypass 1 18, the power multiplexer 1 14, and the switched- capacitor voltage divider 122 may be integrated onto one integrated circuit. In some implementations, the battery charger 126, the bypass 1 18, and the switched- capacitor voltage divider 122 may be integrated onto one integrated circuit. In some implementations, the battery charger 126, the bypass 1 18, the power multiplexer 114, and the switched-capacitor voltage divider 122 may be integrated onto one integrated circuit. In some implementations, the battery charger 126, the bypass 1 18, the power multiplexer 1 14, the controller 1 16, and the switched-capacitor voltage divider 122 may be integrated onto one integrated circuit.

[0031] FIG. 2 illustrates an example power architecture 200 for a battery-powered device 102 during charging by a power supply. The power architecture 200 includes a battery-powered device 102 that is being charged by a wired power supply 204 or a wireless power supply 206 that interfaces with the battery-powered device 102 through a wireless transmitter 208 or both. The battery-powered device 102 uses the power from the wired power supply 204 or the wireless power supply 206 to charge the battery 1 10 of the battery-powered device 102.

[0032] In the example shown in FIG. 2, the battery-powered device 102 may be connected to the wired power supply 204 through a charging cable. The power supply 204 may be configured to provide power 212 at a constant voltage level. For example, the power supply 204 may be a legacy USB power supply that is configured to provide power at five volts.

[0033] The power multiplexer 1 14 receives the power 212 from the power supply 204 through a cable. The controller 1 16 may determine that the power multiplexer 1 14 is receiving power from a wired power supply. In some implementations, the controller 1 16 may attempt to communicate directly with the power supply 204 to request a particular voltage from the power supply 204. If the power supply 204 is not a programmable power supply, then power supply 204 may be unable to respond to the communication from the controller 1 16. Based on the unresponsiveness of the power supply 204, the controller 1 16 may determine that the power supply 204 is not a programmable power supply. The controller 1 16 may also determine that the power supply 204 is providing power 212 at the level of a legacy USB power supply. In this instance, the controller 1 16 may activate the bypass 1 18 so that power 220 from the power multiplexer 1 14 flows through the bypass 224 instead of the switched-capacitor voltage divider 122. In some implementations, the bypass 1 18 does not change the voltage of the power 220 provided by the power multiplexer 1 14. For example, the bypass 1 18 receives power 220 at five volts and provides power 224 at five volts to the battery charger 126. The battery charger 126 receives the power 224 and charges the battery 1 10.

[0034] The battery-powered device 102 may interact with the wireless power supply 206 through a wireless transmitter 208. The wireless transmitter 208 and the wireless receiver 127 are coupled through an inductive coupling 228 that transfers power from the power supply 206 to the battery-powered device 102. In some implementations, the number of wire turns in the wireless receiver 127 may be higher such that a higher voltage is induced in the wireless receiver 126 which results in a lower charging coil current and lower resistive losses. In some implementations, the power supply 206 may be configured to provide power 230 at a constant voltage level. For example, the power supply 206 may be a legacy USB power supply that is configured to provide power at five volts.

[0035] The power multiplexer 1 14 receives the power 230 from the wireless receiver 127. The controller 1 16 may determine that the power multiplexer 1 14 is receiving power from a wireless power supply. Based on the controller 1 16 identifying the power supply 206 as being connected through a wireless interface, the controller 1 16 may determine a voltage level of the power 230 and/or the type of the power supply 206. The controller 1 16 may compare the voltage level of the power 230 to a threshold (e.g., fifteen volts). If the voltage level does not meet the threshold or if the controller 1 16 determines that the power supply 206 is a legacy power supply (e.g., a power supply that supplies five volts), then the controller 1 16 may ensure that the bypass 1 18 is active and power 232 flows from the power multiplexer 1 14 to through the bypass 1 18. The bypass 1 18 may not change the voltage level of the power 220 and may provide power 234 to the battery charger 126 at a same voltage level as the power 220. The battery charger 126 charges the battery 1 10.

[0036] FIG. 3 illustrates an example power architecture 300 for a battery-powered device 302 during charging by a power supply. The power architecture 300 includes a battery-powered device 302 that is being charged by a wired power supply 304 or a wireless power supply 306 that interfaces with the battery-powered device 302 through a wireless transmitter 308 or both. The battery-powered device 302 uses the power from the wired power supply 304 or the wireless power supply 306 to charge the battery 310 of the battery-powered device 302.

[0037] The power architecture 300 may be similar to the power architecture 100 of FIG. 1 or the power architecture 200 of FIG. 2. For example, the controller 316 may activate the bypass 318 and deactivate the switched-capacitor voltage divider 322 if the power supply 304 or the power supply 306 is a legacy USB power supply or the voltage level of the power supply 304 or the power supply 306 is below a threshold. The controller 316 may deactivate the bypass and activate the switched-capacitor voltage divider 322 if the power supply 304 is a programmable power supply or is a USB power delivery device with a voltage above a threshold. The controller 316 may deactivate the bypass and activate the switched-capacitor voltage divider 322 if the power supply 306 is a USB power delivery device with a voltage above a threshold.

[0038] The power architecture 300 may include the battery charger 326 before the bypass 318 and the switched-capacitor voltage divider 322. In this instance, the controller 316 may also communicate with the battery charger 326. If the controller 316 activates the bypass 318 and deactivates the switched-capacitor voltage divider 322, then the battery charger may provide power and operate in a similar manner as if the bypass 318 were located before the battery charger 318. If the controller 316 activates the switched-capacitor voltage divider 322 and deactivates then the bypass 318, then the battery charger may provide power at twice the voltage because the switched-capacitor voltage divider 322 is going to divide the voltage of the received power by two before charging the battery 310.

[0039] In some implementations, a battery charger may be designed to work with higher voltage and low input current, while a switched-capacitor voltage divider may be designed for lower voltage and higher current. In this case, power architecture 300 may be more efficient than power architectures 100 or 200.

[0040] FIG. 4 illustrates an example power charging sequence 400 for a battery- powered device during wireless charging. The power charging sequence 400 includes the voltage level 405 of the output of the wireless receiver, e.g., wireless receiver 127 or 327 and the voltage level 410 of the input to the battery charger, e.g., battery charger 126 or 326.

[0041] The voltage level 405 includes voltage levels for two different charging profiles. During the baseline charging profile (BPP) which is illustrated in FIG. 2, the wireless receiver can provide up to five volts. During the extended charging profile (EPP), which is illustrated in FIG. 1 , the wireless receiver van provide up to nine, twelve, or fifteen volts depending on the voltage provided by the power supply.

[0042] The voltage level 405 of the BPP may have two different phases. The first phase occurs when the battery-powered device is placed on the charging pad or the charging pad is plugged into the power supply. During the first phase, the voltage output of the wireless receiver may increase from zero volts up to five volts, for example. Once the output of the wireless receiver reaches five volts, the controller activates the bypass during the second phase, and the output of the wireless receiver remains at five volts. In some implementations, the default setting for the power architecture for the battery-powered device may be for the bypass and the switched-capacitor voltage divider to be inactive. In some implementations, the bypass may be on while the battery-powered device is off and/or in sleep mode so that the wireless charging pad can wake up the battery-powered device.

[0043] The voltage level 405 of the EPP may have two different phases as well. During the first phase, the voltage output of the wireless receiver may increase from zero volts up to nine, twelve, or fifteen volts, for example. Once the output of the wireless receiver reaches nine, twelve, or fifteen volts, the controller activates the switched-capacitor voltage divider during the second phase, and the output of the wireless receiver remains at nine, twelve, or fifteen volts.

[0044] The voltage level 410 of the BPP may have three different phases. The first phase occurs when the battery-powered device is placed on the charging pad or the charging pad is plugged into the power supply. During the first phase, the voltage input to the battery charger may remain steady at zero volts with both the bypass and switched capacitor voltage divider being off. The controller activates the bypass and the output of the battery charger climbs to five volts during the second phase. During the third phase, the output of the battery charger reaches five volts and holds steady during the remainder of the charging sequence.

[0045] The voltage level 410 of the EPP may have three different phases as well. The first phase occurs when the battery-powered device is placed on the charging pad or the charging pad is plugged into the power supply. During the first phase, the voltage input to the battery charger may remain steady at zero volts with both the bypass and switched capacitor voltage divider being off. The controller activates the switched capacitor voltage divider and the output of the battery charger climbs to 4.5 volts, six volts, or 7.5 volts during the second phase. During the third phase, the output of the battery charger reaches 4.5 volts, six volts, or 7.5 volts and holds steady during the remainder of the charging sequence.

[0046] FIG. 5 illustrates an example architecture 500 for a bypass and a switched- capacitor voltage divider. In the architecture 500, the bypass may be similar to bypass 1 18 or 318, and the switched-capacitor voltage divider may be similar to the switched-capacitor voltage divider 122 or 322. The bypass and switched-capacitor voltage divider of architecture 500 may be included in the same integrated circuit that may include other components of the power architecture illustrated in FIGS. 1 , 2, or 3.

[0047] The circuit 505 illustrates pairs of transistors that cycle on and off while the circuit 505 operates in switched-capacitor mode. Transistors 510 and 515 may turn on and transistors 520 and 525 may turn off during one phase of the switched- capacitor mode. Transistors 520 and 525 may turn on and transistors 510 and 515 may turn off during one phase of the switched-capacitor mode. Depending on the duty cycle of the switching phases, the switched-capacitor voltage divider may divide the incoming voltage by a different factor. For example, if the duty cycle if fifty percent where the transistors 520 and 525 are on and transistors 510 and 515 are off for fifty percent of the time and transistors 520 and 525 are off and transistors 510 and 515 are on for the other fifty percent of the time, then the circuit 505 may divide the incoming voltage by two. In some implementations, the longer that the transistors 520 and 525 are on and transistors 510 and 515 are off, then the greater the factor that the switched-capacitor voltage divider will divide the incoming voltage.

[0048] The circuit 555 illustrates transistors that remain on while the circuit 555 operates in bypass mode. In bypass mode, transistors 560 and 570 are on so that current can flow along path 580. The state of transistors 565 and 575 may not affect the output voltage. During bypass mode, the input voltage and the output voltage may be the same. [0049] FIG. 6 illustrates an example architecture 600 for battery charger. In the architecture 600, the circuits 605 and 655 may be similar to battery charger 126 or 326. The circuits 605 and 655 may be configured to receive power from the bypass or the switched-capacitor voltage divider and charge the battery or receive power from the power multiplexer and provide power to the bypass or the switched- capacitor voltage divider.

[0050] The circuit 605 may switch between transistor 610 being on and transistor 615 being off and transistor 610 being off and transistor 615 being on. The duty cycle of the circuit 605 may be defined as the time period that transistor 610 is on and transistor 615 is off divided by the sum of the time period that the transistor 610 is on and transistor 615 is off plus the time period transistor 610 is off and transistor 615 is on. The output voltage of the circuit 605 may be the duty cycle multiplied by the input voltage.

[0051] The circuit 655 may operate in low drop out (LDO) mode. In LDO mode, transistor 665 is off and transistor 660 operates in linear mode. By operating transistor 660 in linear mode, the circuit 665 controls the output voltage according to the reference. In some implementations, the voltage output by the switched- capacitor voltage divider may be about forty to fifty millivolts higher than the output of circuit 655. The forty to fifty millivolts may be dropped across the circuit in LDO mode.

[0052] FIG. 7 illustrates an example architecture 700 for a power multiplexer 705. The power multiplexer 705 may be similar to power multiplexers 1 14 and 314. The power multiplexer 705 may receive power from power supply 710 which may be similar to power supply 104 and from wireless receiver 715 which may be similar to wireless receiver 127 or 327. The power supply 710 may be a programmable power supply. The wireless receiver 715 may receive power wireless from USB power delivery power supply. The power multiplexer 705 may supply power to the bypass and switched-capacitor voltage divider which may be similar to bypass 1 18 and 318 and switched-capacitor voltage divider 122 and 322. [0053] In the example illustrated in FIG. 7, the power multiplexer 705 may be operating in power sum mode. In power sum mode, the battery-powered device is receiving power from the power supply 710 and the wireless receiver 715. In other words, the battery-powered device is plugged in and resting on a powered wireless charging pad. In power sum mode, the power supply 710 can provide an output voltage that is near the output voltage of the wireless receiver 715.

[0054] In some implementations, the power supply 710 may be used for charging the battery. The power multiplexer 705 may not use the power received from the wireless receiver 715. For this implementations, transistor LS1 is on and transistor LS2 is off. There may be instances where the power supply 710 is not functioning properly because of thermal protection and/or throttling, sharing power between different power sinks causing the available power of the power supply 710 to be reduced, and/or the maximum power of the power supply 710 is lower than expected, e.g., five volts. If the power supply 710 is not functioning properly or for other reasons, then the power multiplexer 705 may renegotiate the power level with both the power supply 710 and the wireless receiver 715 so that the power level of the power supply 710 follows the power level of the wireless receiver 715 more closely. The power multiplexer 705 may use current sharing to make sure the load is properly shared between the power supply 710 and the power supply providing power to the wireless receiver 715.

[0055] FIG. 8 illustrates an example architecture 800 for a power multiplexer 805. The power multiplexer 805 may be similar to power multiplexers 1 14 and 314. The power multiplexer 805 may receive power from power supply 810 which may be similar to power supply 104 and from wireless receiver 815 which may be similar to wireless receiver 127 or 327. The power supply 810 may be a programmable power supply. The wireless receiver 815 may receive power wireless from USB power delivery power supply. The power multiplexer 805 may supply power to the bypass and switched-capacitor voltage divider which may be similar to bypass 1 18 and 318 and switched-capacitor voltage divider 122 and 322.

[0056] In the example illustrated in FIG. 8, the power multiplexer 805 may be operating in power sum mode, where the power supply 810 is able to supply a maximum eighteen watts, and the wireless receiver 815 provides up to nine volts at 1.1 amps. In the case where the architecture 800 would pull twenty seven watts, the power multiplexer 805 may control transistor LS1 so that the output voltage (V _mUx ) of the power multiplexer 805 is near nine volts, which is the output voltage of the wireless receiver 815. By controlling transistor LS1 , the power multiplexer 805 affects the current l _pps such that the power supply 810 attempt to provide more than eighteen watts. The power multiplexer 805 controls transistor LS2 to regulate current l _wic to supplement the power supply 810 and ensure the wireless charging power is not over the power limit of nine volts at 1 .1 amps.

[0057] FIG. 9 illustrates an example model 900 for a power multiplexer 905. The power multiplexer 905 may be similar to power multiplexers 1 14 and 314. The power multiplexer 905 may receive power from V _pps which may be similar to power supply 104 and from V _wic which may be similar to wireless receiver 127 or 327. The output of the power multiplexer 905, V _mUx , may be provided to the bypass and switched-capacitor voltage divider.

[0058] In the model 900, the power supply V _pps may be modeled as a variable power source that may have a source impedance that is not illustrated. The output of the V _wic power supply may be modeled as a fixed voltage source with a source impedence of R _wic , which in this example is ten milliohms. Both transistors LS1 and LS2 from power architectures 700 and 800 may be modeled as resistors R _LSI and R _LS2 , respectively. The power multiplexer 905 may choose to first use the V _pps source as the main power source during initialization. For example, the V _pps may be set to nine volts and provide eighteen watts to the V _mUx node.

[0059] The R _LSI may be almost fully with R _LSI being about ten milliohms. In this instance, the V _mUx may be about 8.8 volts, and the power architecture may draw more power which may cause V _mUx to drop. If this happens, the power multiplexer 905 may allow the V _wic source to supplement the power to prevent the V _mUx from dropping. The power multiplexer 905 may vary the resistance of R _LS 2 to ensure that the power and/or current is not over the capacity of the V _wic source. At that point, the V _mux may be 8.8 volts at twenty-seven watts and reach equilibrium. [0060] FIG. 10 shows an example of a computing device 1000 and a mobile computing device 1050 that can be used to implement the techniques described here. The computing device 1000 is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The mobile computing device 1050 is intended to represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smart-phones, and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not meant to be limiting.

[0061] The computing device 1000 includes a processor 1002, a memory 1004, a storage device 1006, a high-speed interface 1008 connecting to the memory 1004 and multiple high-speed expansion ports 1010, and a low-speed interface 1012 connecting to a low-speed expansion port 1014 and the storage device 1006. Each of the processor 1002, the memory 1004, the storage device 1006, the high-speed interface 1008, the high-speed expansion ports 1010, and the low-speed interface 1012, are interconnected using various busses, and may be mounted on a common motherboard or in other manners as appropriate. The processor 1002 can process instructions for execution within the computing device 1000, including instructions stored in the memory 1004 or on the storage device 1006 to display graphical information for a GUI on an external input/output device, such as a display 1016 coupled to the high-speed interface 1008. In other implementations, multiple processors and/or multiple buses may be used, as appropriate, along with multiple memories and types of memory. Also, multiple computing devices may be connected, with each device providing portions of the necessary operations (e.g., as a server bank, a group of blade servers, or a multi-processor system).

[0062] The memory 1004 stores information within the computing device 1000. In some implementations, the memory 1004 is a volatile memory unit or units. In some implementations, the memory 1004 is a non-volatile memory unit or units. The memory 1004 may also be another form of computer-readable medium, such as a magnetic or optical disk. [0063] The storage device 1006 is capable of providing mass storage for the computing device 1000. In some implementations, the storage device 1006 may be or contain a computer-readable medium, such as a floppy disk device, a hard disk device, an optical disk device, or a tape device, a flash memory or other similar solid state memory device, or an array of devices, including devices in a storage area network or other configurations. Instructions can be stored in an information carrier. The instructions, when executed by one or more processing devices (for example, processor 1002), perform one or more methods, such as those described above.

The instructions can also be stored by one or more storage devices such as computer- or machine-readable mediums (for example, the memory 1004, the storage device 1006, or memory on the processor 1002).

[0064] The high-speed interface 1008 manages bandwidth-intensive operations for the computing device 1000, while the low-speed interface 1012 manages lower bandwidth-intensive operations. Such allocation of functions is an example only. In some implementations, the high-speed interface 1008 is coupled to the memory 1004, the display 1016 (e.g., through a graphics processor or accelerator), and to the high-speed expansion ports 1010, which may accept various expansion cards (not shown). In the implementation, the low-speed interface 1012 is coupled to the storage device 1006 and the low-speed expansion port 1014. The low-speed expansion port 1014, which may include various communication ports (e.g., USB, Bluetooth, Ethernet, wireless Ethernet) may be coupled to one or more input/output devices, such as a keyboard, a pointing device, a scanner, or a networking device such as a switch or router, e.g., through a network adapter.

[0065] The computing device 1000 may be implemented in a number of different forms, as shown in the figure. For example, it may be implemented as a standard server 1020, or multiple times in a group of such servers. In addition, it may be implemented in a personal computer such as a laptop computer 1022. It may also be implemented as part of a rack server system 1024. Alternatively, components from the computing device 1000 may be combined with other components in a mobile device (not shown), such as a mobile computing device 1050. Each of such devices may contain one or more of the computing device 1000 and the mobile computing device 1050, and an entire system may be made up of multiple computing devices communicating with each other.

[0066] The mobile computing device 1050 includes a processor 1052, a memory 1064, an input/output device such as a display 1054, a communication interface 1066, and a transceiver 1068, among other components. The mobile computing device 1050 may also be provided with a storage device, such as a micro-drive or other device, to provide additional storage. Each of the processor 1052, the memory 1064, the display 1054, the communication interface 1066, and the transceiver 1068, are interconnected using various buses, and several of the components may be mounted on a common motherboard or in other manners as appropriate.

[0067] The processor 1052 can execute instructions within the mobile computing device 1050, including instructions stored in the memory 1064. The processor 1052 may be implemented as a chipset of chips that include separate and multiple analog and digital processors. The processor 1052 may provide, for example, for coordination of the other components of the mobile computing device 1050, such as control of user interfaces, applications run by the mobile computing device 1050, and wireless communication by the mobile computing device 1050.

[0068] The processor 1052 may communicate with a user through a control interface 1058 and a display interface 1056 coupled to the display 1054. The display 1054 may be, for example, a TFT (Thin-Film-Transistor Liquid Crystal Display) display or an OLED (Organic Light Emitting Diode) display, or other appropriate display technology. The display interface 1056 may comprise appropriate circuitry for driving the display 1054 to present graphical and other information to a user. The control interface 1058 may receive commands from a user and convert them for submission to the processor 1052. In addition, an external interface 1062 may provide communication with the processor 1052, so as to enable near area communication of the mobile computing device 1050 with other devices. The external interface 1062 may provide, for example, for wired communication in some implementations, or for wireless communication in other implementations, and multiple interfaces may also be used. [0069] The memory 1064 stores information within the mobile computing device 1050. The memory 1064 can be implemented as one or more of a computer- readable medium or media, a volatile memory unit or units, or a non-volatile memory unit or units. An expansion memory 1074 may also be provided and connected to the mobile computing device 1050 through an expansion interface 1072, which may include, for example, a SIMM (Single In Line Memory Module) card interface. The expansion memory 1074 may provide extra storage space for the mobile computing device 1050, or may also store applications or other information for the mobile computing device 1050. Specifically, the expansion memory 1074 may include instructions to carry out or supplement the processes described above, and may include secure information also. Thus, for example, the expansion memory 1074 may be provide as a security module for the mobile computing device 1050, and may be programmed with instructions that permit secure use of the mobile computing device 1050. In addition, secure applications may be provided via the SIMM cards, along with additional information, such as placing identifying information on the SIMM card in a non-hackable manner.

[0070] The memory may include, for example, flash memory and/or NVRAM memory (non-volatile random access memory), as discussed below. In some implementations, instructions are stored in an information carrier that the instructions, when executed by one or more processing devices (for example, processor 1052), perform one or more methods, such as those described above.

The instructions can also be stored by one or more storage devices, such as one or more computer- or machine-readable mediums (for example, the memory 1064, the expansion memory 1074, or memory on the processor 1052). In some

implementations, the instructions can be received in a propagated signal, for example, over the transceiver 1068 or the external interface 1062.

[0071] The mobile computing device 1050 may communicate wirelessly through the communication interface 1066, which may include digital signal processing circuitry where necessary. The communication interface 1066 may provide for communications under various modes or protocols, such as GSM voice calls (Global System for Mobile communications), SMS (Short Message Service), EMS

(Enhanced Messaging Service), or MMS messaging (Multimedia Messaging Service), CDMA (code division multiple access), TDMA (time division multiple access), PDC (Personal Digital Cellular), WCDMA (Wideband Code Division Multiple Access), CDMA2000, or GPRS (General Packet Radio Service), among others.

Such communication may occur, for example, through the transceiver 1068 using a radio-frequency. In addition, short-range communication may occur, such as using a Bluetooth, WiFi, or other such transceiver (not shown). In addition, a GPS (Global Positioning System) receiver module 1070 may provide additional navigation- and location-related wireless data to the mobile computing device 1050, which may be used as appropriate by applications running on the mobile computing device 1050.

[0072] The mobile computing device 1050 may also communicate audibly using an audio codec 1060, which may receive spoken information from a user and convert it to usable digital information. The audio codec 1060 may likewise generate audible sound for a user, such as through a speaker, e.g., in a handset of the mobile computing device 1050. Such sound may include sound from voice telephone calls, may include recorded sound (e.g., voice messages, music files, etc.) and may also include sound generated by applications operating on the mobile computing device 1050.

[0073] The mobile computing device 1050 may be implemented in a number of different forms, as shown in the figure. For example, it may be implemented as a cellular telephone 1080. It may also be implemented as part of a smart-phone 1082, personal digital assistant, or other similar mobile device.

[0074] Various implementations of the systems and techniques described here can be realized in digital electronic circuitry, integrated circuitry, specially designed ASICs (application specific integrated circuits), computer hardware, firmware, software, and/or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device. [0075] These computer programs (also known as programs, software, software applications or code) include machine instructions for a programmable processor, and can be implemented in a high-level procedural and/or object-oriented programming language, and/or in assembly/machine language. As used herein, the terms machine-readable medium and computer-readable medium refer to any computer program product, apparatus and/or device (e.g., magnetic discs, optical disks, memory, Programmable Logic Devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term machine-readable signal refers to any signal used to provide machine instructions and/or data to a programmable processor.

[0076] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0077] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a client computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet. [0078] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

[0079] Although a few implementations have been described in detail above, other modifications are possible. For example, while a client application is described as accessing the delegate(s), in other implementations the delegate(s) may be employed by other applications implemented by one or more processors, such as an application executing on one or more servers. In addition, the logic flows depicted in the figures do not require the particular order shown, or sequential order, to achieve desirable results. In addition, other actions may be provided, or actions may be eliminated, from the described flows, and other components may be added to, or removed from, the described systems. Accordingly, other implementations are within the scope of the following claims.