ZONE-BASED LEAKAGE POWER OPTIMIZATION

Title:

ZONE-BASED LEAKAGE POWER OPTIMIZATION

Document Type and Number:

WIPO Patent Application WO/2011/094031

Kind Code:

A3

Abstract:

A leakage power optimization system optimizes leakage power of a circuit design which includes a set of logic gates. The system selects a leakage-power-reducing transformation for a logic gate, and determines a zone around the logic gate. This zone includes logic gates within a first predetermined number of levels in the logic gate's fan-out, the logic gate's fan-in, and a second predetermined number of levels in the logic gate's fan-in's fan-out. The system propagates arrival times within the zone to obtain updated slack values at endpoints of the zone. Then, in response to determining that the updated slack values at the endpoints of the zone do not degrade one or more circuit timing metrics, the system applies the leakage-power-reducing transformation to the logic gate.

Inventors:

IYER MAHESH A (US)
KUNDU SUDIPTO (US)

Application Number:

PCT/US2011/020083

Publication Date:

September 29, 2011

Filing Date:

January 04, 2011

Export Citation:

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Assignee:

SYNOPSYS INC (US)
IYER MAHESH A (US)
KUNDU SUDIPTO (US)

International Classes:

G06F1/32

Foreign References:

US20020124230A1	2002-09-05
US20070016881A1	2007-01-18
US7370294B1	2008-05-06
US7840918B1	2010-11-23

Other References: