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Title:
マシンビジョンシステム内で照射された際に高度なパターン認識を示す半導体装置
Document Type and Number:
Japanese Patent JP2005538565
Kind Code:
A
Abstract:
A bumped semiconductor device (10) exhibiting enhanced pattern recognition when illuminated in a machine vision system. The semiconductor device has a substantially coplanar array of solder bumps (16) and a coating of underfill material (17) on one face. A fluxing composition (18) containing an image enhancing agent is selectively deposited over at least two of the solder bumps in the array to modify the optical characteristics of the solder bumps to cause the solder bumps to appear bright against the background of the underfill material when the semiconductor device is illuminated (19) by selected wavelengths of light.

Inventors:
Ji, Jin
Dan Beer, Janice
Han, Jao Jin
Kurkarni, Prasanna
Yarra, Nadia
Dout, robert
Application Number:
JP2004536129A
Publication Date:
December 15, 2005
Filing Date:
September 05, 2003
Export Citation:
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Assignee:
Freescale Semiconductor, Inc.
International Classes:
H01L21/60; H01L21/66; H01L23/544; H05K1/02; H05K3/34; (IPC1-7): H01L21/60
Domestic Patent References:
JPS6369293A1988-03-29
JPH11307586A1999-11-05
JP2002009498A2002-01-11
JPH10125720A1998-05-15
JP2000357712A2000-12-26
JP2001015641A2001-01-19
JPH08250846A1996-09-27
Attorney, Agent or Firm:
Mamoru Kuwagaki