Title:
多層配線基板及びその製造方法
Document Type and Number:
Japanese Patent JP5173160
Kind Code:
B2
Abstract:
A multilayer wiring substrate has a plurality of wiring layers (13a-13e; 35, 43, 49, 55, 65) and interlayer insulating films (15ab-15de; 37, 45, 51, 57), as well as a via of a type which connects between adjacent wiring layers and a via (17', 63) of a type which connects upper and lower wiring layers through two or more interlayer insulating films, wherein at least some of the interlayer insulating films (15ab-15de; 37, 45, 51, 57) are formed of inorganic insulating films, and the via of the type, which connects upper and lower wiring layers through two or more interlayer insulating films, is formed as a single via which penetrates through the interlayer insulating films all of which are formed of the inorganic insulating films. Preferably, all of the insulating films are formed of the inorganic insulating films, and the inorganic insulating films are formed by a low-temperature CVD method. The thickness of the inorganic insulating films is preferably between 0.5 and 2.0µm.
More Like This:
Inventors:
Masahiro Sunohara
Application Number:
JP2006194753A
Publication Date:
March 27, 2013
Filing Date:
July 14, 2006
Export Citation:
Assignee:
Shinko Electric Industry Co., Ltd.
International Classes:
H01L23/12; H05K3/46
Domestic Patent References:
| JP3072693A | ||||
| JP6291518A | ||||
| JP6053350A |
Attorney, Agent or Firm:
Atsushi Aoki
Takashi Ishida
Tetsuji Koga
Nagasaka Tomoyasu
Takashi Ishida
Tetsuji Koga
Nagasaka Tomoyasu