Title:
積層セラミック電子部品の製造方法
Document Type and Number:
Japanese Patent JP6487364
Kind Code:
B2
Abstract:
A multi-layer ceramic capacitor, including a multi-layer including internal electrodes and dielectric layers alternately laminated, the internal electrodes having ends protruding beyond the dielectric layers in surface directions thereof; and side protective layers configured of a dielectric and disposed to cover side faces of the multi-layer, the side protective layers each having spacing sections formed between the ends of the internal electrodes.
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Inventors:
Ryo Ohno
Tetsuhiko Fukuoka
Tetsuhiko Fukuoka
Application Number:
JP2016067671A
Publication Date:
March 20, 2019
Filing Date:
March 30, 2016
Export Citation:
Assignee:
TAIYO YUDEN CO.,LTD.
International Classes:
H01G4/30; H01G4/12
Domestic Patent References:
JP2012227354A | ||||
JP2011023707A | ||||
JP2009302129A | ||||
JP11288841A | ||||
JP2009016796A | ||||
JP2013179267A | ||||
JP2012230973A |
Attorney, Agent or Firm:
Junichi Omori
Masayoshi Sekine
Masayoshi Sekine