Title:
半導体装置
Document Type and Number:
Japanese Patent JP6609019
Kind Code:
B2
Abstract:
To improve the reliability of a semiconductor device including a low-resistance material such as copper, aluminum, gold, or silver as a wiring. Provided is a semiconductor device including a pair of electrodes electrically connected to a semiconductor layer which has a stacked-layer structure including a first protective layer in contact with the semiconductor layer and a conductive layer containing the low-resistance material and being over and in contact with the first protective layer. The top surface of the conductive layer is covered with a second protective layer functioning as a mask for processing the conductive layer. The side surface of the conductive layer is covered with a third protective layer. With this structure, entry or diffusion of the constituent element of the pair of conductive layers containing the low-resistance material into the semiconductor layer is suppressed.
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Inventors:
Junichi Koizuka
Masami Nagasawa
Gyoutoku Shima
Takahiro Iguchi
Masami Nagasawa
Gyoutoku Shima
Takahiro Iguchi
Application Number:
JP2018208185A
Publication Date:
November 20, 2019
Filing Date:
November 05, 2018
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786; H01L21/28; H01L21/336; H01L29/417; H01L29/45
Domestic Patent References:
| JP2013080918A | ||||
| JP6268218A | ||||
| JP2011082380A | ||||
| JP2011076079A | ||||
| JP10242474A |
Foreign References:
| WO2012108301A1 | ||||
| US20130075722 |