PURPOSE: To raise the potential of an X address signal line at high speed by connecting a pull up circuit to the X address signal line.
CONSTITUTION: In an address circuit using multi-address wirings and connecting a Y address signal line to the X address signal line through a transfer transistor, the potential of the X address signal line AX is raised at the high speed and the pull up circuit 14 is connected to the X address signal line AX in order to eliminate the delay in time in comparison with the rise in the potential of the Y address signal line AY. Namely, the pull up circuit is constituted of an inverter 12 and a NAND13, and the inverter 12 is constituted of an N channel transistor Q14 and a P channel transistor Q13 having a current capacity n times larger (n>1) than the current capacity of this transistor Q14.
JPS55150189A | 1980-11-21 |