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Title:
ALIGNMENT DEVICE FOR SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPS6233437
Kind Code:
A
Abstract:

PURPOSE: To shorten the transfer time for dummy wafers and to prevent semiconductor wafers from being contaminated and damaged at the time of transfer by forming fine grooves having the same pitch as that of the fine grooves of an alignment jig in the chuck of a transfer unit.

CONSTITUTION: The alignment device for semiconductor wafers is provided with a dummy wafer transfer unit 31 having a chuck 33 which grasps dummy wafers 32 arranged in the vicinities of diffusion boats 11 and since fine grooves 36 having the same pitch as that of the fine grooves of the diffusion boats 11 are formed in the chuck 33, a large number of the dummy wafers 32 can be aligned at once on the fine grooves 11a and 11b of the diffusion boats 11 without passing through a hand. For transferring semiconductor silicon wafers 13, two groups of the dummy wafers 32 are born on the diffusion boats 11, each at an interval in advance to each other, then the semiconductor silicon wafers 13 are born between the both groups of the dummy wafers 32 and the dummy wafers 32 on the other side are grasped by the chuck 33 to be adjoined the semiconductor silicon wafers 13.


Inventors:
YAMAMOTO AKIMITSU
MIDO YOICHI
Application Number:
JP17646985A
Publication Date:
February 13, 1987
Filing Date:
August 07, 1985
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/677; B65H9/00; H01L21/67; H01L21/68; (IPC1-7): B65H9/00; H01L21/68
Domestic Patent References:
JP59091735B
JPS5085275A1975-07-09
Attorney, Agent or Firm:
Mamoru Takada (1 person outside)