PURPOSE: To set up optionally a write inhibition area of a RAM to be controlled only by the change of data in a ROM for selecting a write inhibition address by setting up a specific data in the same address of the ROM as the write inhibition address of the RAM and setting up the specific data in an input obtained from a write inhibition signal line.

CONSTITUTION: An address bus line 4 is connected to an address bus input terminal 11 of the write inhibition address selecting ROM 1 and an address bus input terminal 31 of the RAM 3 to be controlled and a write inhibition address signal line 5 is connected to a data signal output terminal 12 of the ROM 1 and a chip selection control circuit 2. In addition, a write inhibition signal line 6 is connected to a write inhibition signal input terminal 22 of the control circuit 2 and a chip selecting instruction line 7 is connected to a chip selection signal input terminal 23 of the control circuit 2. A chip selection signal line 8 is connected to a chip selection signal output terminal 25 of the control circuit 2 and a chip selection signal input terminal 32 of the RAM 3 and a write signal line 9 is connected to a write signal input terminal 24 of the control circuit 2 and a write signal input terminal 33 of the RAM 3.