Title:
DIGITAL SIGNAL RECORDING SYSTEM
Document Type and Number:
Japanese Patent JPH04252472
Kind Code:
A
Abstract:
PURPOSE:To heighten recording density and to suppress the final clock frequency from remarkably increasing when digital data is recorded. CONSTITUTION:The digital data DD of 16 bits consisting of two pairs of data DA1, DA2 of eight bits is converted into codes DF, DG that is the codes of 23 bits and in which no '1' is continued. Control codes rb, db of three bits for DC component control are attached on a converted code of 23 bits, and a code DE of 26 bits consisting of the converted code of 23 bits and the control code of three bits is recorded after NRZI modulation is applied.
Inventors:
YOSHINAKA TADAAKI
Application Number:
JP920891A
Publication Date:
September 08, 1992
Filing Date:
January 29, 1991
Export Citation:
Assignee:
SONY CORP
International Classes:
G11B20/14; H03M7/14; (IPC1-7): G11B20/14; H03M7/14
Attorney, Agent or Firm:
Hidekuma Matsukuma