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Title:
DISPLAY DEVICE
Document Type and Number:
Japanese Patent JPH05323929
Kind Code:
A
Abstract:

PURPOSE: To provide a display device generating a dot clock corresponding to a video signal with high versatility.

CONSTITUTION: The display device generates the dot clock signal based on an inputted horizontal synchronizing signal Hsync and can receive a different video frequency signal by using a phase sinchronizing circuit having a phase comparator circuit 3, a low pass filter 4, a voltage controlled oscillator 5 and a frequency divider circuit 2. The device is provided with a CPU1 detecting the frequency FHsync of the inputted horizontal synchronizing signal Hsync, deciding a dividing ratio N corresponding to the detected frequency FHsync and setting the decided dividing ratio N to the frequency divider circuit 2, and a divided signal based on the dividing ratio N and the horizontal synchronizing signal Hsync are phase-comparated then the dot clock signal based on the dividing ratio is generated.


Inventors:
MORIMURA TAKUO
Application Number:
JP15743292A
Publication Date:
December 07, 1993
Filing Date:
May 25, 1992
Export Citation:
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Assignee:
SONY CORP
International Classes:
G09G5/12; H04N5/06; H04N5/66; H04N5/93; (IPC1-7): G09G5/12; H04N5/06; H04N5/66; H04N5/93
Attorney, Agent or Firm:
Takahisa Sato



 
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